msm7731-01 Oki Semiconductor, msm7731-01 Datasheet
msm7731-01
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msm7731-01 Summary of contents
Page 1
... Power-down mode: • Control by both the serial microcomputer interface and parallel port is possible • Transmit/receive mute function, transmit/receive programmable gain setting • Package: 64-pin plastic QFP (QFP64-P-1414-0.80-BK) (Product name: MSM7731-01GA) This version: Aug. 1998 Tacoud = 59 ms – Tlined (max.) Tacoud = 59 ms (max.) ...
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Linear CODEC Acoustic Echo Canceler (Acoustic side) SinA SoutA STTsA BPF Center + + LPADA Clip – – AIN + ADC Acoustic Adaptive FIR Filter AGSX RC LPF (AAFF) Power Calc. AVFRO RC LPF Howling Detector Double Talk Det APWI ...
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... PIN CONFIGURATION (TOP VIEW) ECSEL 1 MCUSEL 2 AHD 3 AHLD 4 AATT 5 AGC 6 DGND1 7 ATHR 8 LHD 9 LHLD 10 LATT 11 LGC 12 LTHR 13 RPAD4 DD1 RPAD3 16 64-Pin Plastic QFP MSM7731-01 48 PCMEO 47 PCMO 46 PCMSEL 45 SYNCSEL 44 DOUT DEN DD2 GLPADTHR 41 40 TEST9 LINEEN 39 38 AGND 37 LOUT 36 LPWI 35 LVFRO 34 LGSX 33 LIN 3/43 ...
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... CLKSEL PDN/RST SLPTHR I 62 NCTHR MSM7731-01 Type LIN I LGSX O O LPWI I LOUT O AGND I I TEST9 DD2 DEN I DOUT PCMO O O PCMEI I PCMI I I BCLK ...
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... Acoustic CODEC Line CODEC AGSX R2 to ENCODER AIN – VREF AVFRO from DECODER R3 APWI R4 C2 AOUT – Reception signal Transmission signal Figure 1 Analog Interface MSM7731-01 LGSX LIN Same as the acoustic analog interface LVFRO LPWI LOUT LINEEN Line side (portable phone) 5/43 ...
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... This is the crystal oscillator output pin existing external clock used, leave this pin open and input the clock to the MCK pin. Refer to Figure 2 (b) for an example oscillator circuit. MCK/X1 Figure 2 (a) External Clock Application Example X2 MCK/X1 Crystal C Figure 2 (b) Oscillator Circuit Example MSM7731- T.B T.B.D Crystal : 19.2 MHz C ...
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... It is also at high impedance during the power-down reset and the initial modes. The coding format can be selected as m-law PCM or 16-bit linear (2's complement) by the PCMSEL pin. The sync format can be selected as normal-sync or short- frame-sync by the SYNCSEL pin. Refer to Figure 3 for the timing. MSM7731-01 7/43 ...
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... Since this pin is logically ORed with the PCMSEL bit (CR11-B1), set the pin to a logic "0" when controlling by the control register. If the pin setting is changed, reset must be performed by either the PDN/RST pin or the PDN/ RST bit (CR0-B7). MSM7731-01 8/43 ...
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... PCM coding format timing (short-frame sync) Figure 3 Digital Interface Timing MSM7731-01 D15 D14 D15 D14 Hi Hi-Z D15 D15 Hi Hi-Z 9/43 ...
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... B1 and CR5-B1 bits of the control register, set the pin to a logic "0" when controlling by the control register. Because data is shifted into this pin in synchronization with the rising edge of the SYNC signal, hold the data at the pin for 250 ms or longer. For further details, refer to the electrical characteristics. MSM7731-01 10/43 ...
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... Because data is shifted into this pin in synchronization with the rising edge of the SYNC signal, hold the data at the pin for 250 ms or longer. For further details, refer to the electrical characteristics. MSM7731-01 11/43 ...
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... This pin selects whether the microcomputer interface is used or unused. A logic "0" specifies that the microcomputer interface is used and a logic "1" specifies that it is not used. If the microcomputer interface is not used, this pin must be set to a logic "1". This pin is ORed with the CR0-B1 bit of the control register. MSM7731-01 12/43 ...
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... MSM7731- ...
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... MSM7731-01 TPAD2 TPAD1 Level – –6 dB ...
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... BCLK to SYNC (during input SYNC to BCLK (during input DOUT, PCMO, PCMEO DL C DOUT, PCMO, PCMEO DL1 C SYNC, BCLK (during output) DL2 MSM7731-01 Rating Unit –0.3 to +5.0 V –0 +0 –0 +0 –55 to +150 °C Min. Typ. ...
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... LOUT AGSX, AVFRO, AOUT LGSX, LVFRO, LOUT AGSX, AVFRO AOUT LGSX, LVFRO LOUT AVFRO AOUT AVFRO LOUT SG SG MSM7731-01 Min. Typ. Max. Unit — — 0 — — — — 0.5¥V — ...
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... kW kW M10 M11 f ECK MSM7731- –25°C to +70°C) DD Min. Typ. Max. 1 — — 1.6 — — 50 — — 200+a (*2) 140 — 180 250 — — — — 250 — ...
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... A/LGSX 1020 0 A/LVFRO Noise Level: — MSM7731-01 Min. Typ. Max. Unit 25 — — dB –0.15 — +0.20 dB Reference dB –0.15 — +0. — 0. — — dB –0.15 — ...
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... Power supply voltage 3V CODEC input gain = 1 CODEC output gain = 1 (V Condition MSM7731 L.P.F. Analog NC 5kHz AIN Power supply voltage 3V CODEC input gain = 1 CODEC output gain = 1 MSM7731- –25°C to +70°C) Min. Typ. Max. Unit 35 — — 30 — — 59 — — ...
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... Note: Applies to the following pins/control bits: LINEEN, SLPTHR, NCTHR, GLPADTHR, TPAD6-1, RPAD6-1, RST, ATHR, AATT, AHLD, AHD, AGC, LTHR, LATT, LHLD, LHD, and LGC t RSTW t t PDND PDNH Power-down Hi-Z t PDNS t PARW t t PARD PARH Internal processing MSM7731-01 Initial mode (Internal write) 20/43 ...
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... SYNC PCMO PCMEO Hi MSB XD1 XD2 XD1 XD2 MSB MSM7731- LSB LSB XD3 LSB Hi XD3 LSB Hi-Z 21/43 ...
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... Semiconductor Microcomputer Interface I/O Timing MSM7731-01 22/43 ...
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... Rin input level [dBm kHz band white noise : –26dBm (with GLPAD= 6dB) : –32dBm (with GLPAD= 12dB) : –38dBm (with GLPAD= 18dB) : 4ms : OFF : –60dBm (P-message filter unused) E.R.L vs. echo attenuation (with GLPAD) –25 –20 –15 –10 –5 0 E.R.L. [dB] MSM7731-01 –20 –15 – 23/43 ...
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... Dual echo canceler mode (acoustic side Echo delay time [ms kHz band white noise : –6dB : OFF : –60dBm (P-message filter unused) Echo delay time vs. echo attenuation Dual echo canceler mode (line side Echo delay time [ms] MSM7731- 24/43 ...
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... OFF : –60dBm (P-message filter unused) Echo delay time vs. echo attenuation Single echo canceler mode Echo delay time [ms] : –60dBm (P-message filter unused) Slope filter frequency characteristic 1001 1501 2001 2501 Frequency [Hz] MSM7731- 3001 3501 25/43 ...
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... OFF : ON : –60dBm (P-message filter unused 100 + R8 C9 2.2k 10µ J1 MIC RV1 C10 734 1µ R9 22k R13 22k U13 LM4861 R14 1 22k R15 2 1.2k R16 3 10k 4 RV4 10k C13 0.1µ C14 R17 0.1µ 470k C15 10p AG MSM7731-01 MIC 26/43 ...
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... ACLP A14 A13 A12 A11 D14 D13 D12 D11 — — — — — — — — MSM7731-01 R OPE OPE R/W *MCUSEL *ECSEL *SLPTHR *NCTHR R/W *GLPADTHR RPAD3 RPAD2 RPAD1 R/W TPAD3 TPAD2 TPAD1 R/W *LHLD *LATT *LGC R/W *AHLD ...
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... This bit can only be set to "0" or "1" during power-down reset and the initial mode LINEEN CLKEN PCMEN RST power-on, 0: normal operation, 0: ON, 0: ON, 0: ON, 0: ON, MSM7731- OPE OPE PCMEEN MCUSEL ECSEL power-down reset 1: reset 1: OFF 1: OFF ...
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... Acoustic Acoustic Echo CODEC Noise Slope Canceler Canceler Filter Figure 6 Dual Echo Canceler Mode Acoustic Acoustic Echo CODEC Noise Slope Canceler Canceler Filter Figure 7 Single Echo Canceler Mode MSM7731-01 Line Line Echo CODEC Canceler Line CODEC 29/43 ...
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... NCTHR pin. If this bit is changed to the normal mode, approximately data dropout will occur — — — — Modification of initial values is inhibited 0: "through mode", 0: normal mode (slope filter operation), 1: "through mode" MSM7731- GLPADTHR SLPTHR NCTHR write 1: normal mode 30/43 ...
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... MUTE MSM7731- RPAD3 RPAD2 RPAD1 0 0 ...
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... MUTE MSM7731- TPAD3 TPAD2 TPAD1 0 0 ...
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... This bit is internally ORed with the LGC pin LHD — — LCLP Modification of initial values is inhibited 1: OFF, 1: ON, 1: fixed coefficients, 1: ATT OFF OFF, MSM7731- LATT LGC LHLD OFF 0: updated coefficients 0: ATT 33/43 ...
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... This bit is internally ORed with the AGC pin AHD — — ACLP Modification of initial values is inhibited 1: OFF, 1: ON, 1: fixed coefficients, 1: ATT OFF OFF, MSM7731- AATT AGC AHLD OFF 0: updated coefficients 0: ATT 34/43 ...
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... A14 A13 A12 A11 D14 D13 D12 D11 MSM7731- A10 D10 ...
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... GLPADTHR control register bit (CR1-B2). Set the level such that echo return loss (value of returned echo) will be attenuated. ( – ( – ( – ( LPADA2 LPADA1 GPADL2 MSM7731- GPADL1 LPADL2 LPADL1 36/43 ...
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... Modification of initial values is inhibited 1: m-law PCM, 1: SYNC power-down ON — — — — Modification of initial value is inhibited. MSM7731- — PCMSEL SYPDN write disabled 0: 16-bit linear 0: SYNC power-down OFF — — — ...
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... Logic "0" Logic "0" Logic "0" Logic "0" Logic "0" Logic "0" Logic "0" Logic "0" Logic "1" Logic "0" Logic "0" Logic "0" MSM7731- ...
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... Memory address of acoustic echo canceler delay time: 009BH Memory address of line echo canceler delay time: 009CH The method for calculating delay time is shown below. delay time [s] ¥ 8000 = delay time data (HEX) Example of 30 ms: 0.03 ¥ 8000 = 240 (DEC) = 00F0 (HEX) MSM7731-01 39/43 ...
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... Type 2 approx (typ.) Type 3 approx (typ.) Note: Only type 1 is compatible with pin control. Memory address: 01C8H Data to be stored: Type 1 Type 2 Type 3 Noise attenuation Sound quality Better than Type 1 Better than Type 2 Data 2000H 3333H 4666H MSM7731-01 Typ. 40/43 ...
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... Normal mode (slope filter operation) NCTHR : Normal mode (noise canceler operation) RPAD6-1 : Adjusting the volume of receive signal. TPAD6-1 : Adjusting the volume of transmit signal. to prevent overflow Adjust the volume with TPAD and RPAD. with the analog input (LIN) that is set at less than 1. MSM7731-01 41/43 ...
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... Semiconductor APPLICATION CIRCUIT MSM7731-01 cnt n cnt 1 DEN EXCK DIN DOUT SYNC SYNCSEL BCLK CLKSEL PCMSEL PDN/RST MCK/X1 X2 42/43 ...
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... Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). MSM7731-01 (Unit : mm) Package material Epoxy resin ...