msm7661b Oki Semiconductor, msm7661b Datasheet - Page 5

• Manufacturer Part Number: msm7661b
• Description: Ntsc/pal Digital Video Decoder
• Manufacturer: Oki Semiconductor

¡ Semiconductor
PIN DESCRIPTIONS
21 to 24
9 to 16
1 to 8
Pin
17
18
19
20
25
26
27
28
29
30
31
32
MODE[0 to 3]
CVBS[0 to 7]
CD[0 to 7]
RESET_L
Symbol
CLKSEL
PLLSEL
TEST1
SLEEP
GND
GND
SDA
SCL
V
V
TE
DD
DD
Type
I/O
I
I
I
I
I
I
I
I
I
I
Chrominance signal input pin (valid only for S video input)
Set each pin to "L" level at composite signal input.
Composite signal input pin
Luminance signal is input for S video input.
I
I
Mode input pins. These pins are internally pulled-down.
MODE[3]
MODE[1:0]
If ITU-R signals are input when registers are set to automatic NTSC/PAL
recognition mode, NTSC/PAL is automatically recognized irrespective of
MODE2 setting.
System reset pin (active at "L")
Unused.
Fixed to "H" externally.
Clock select input pin.
"L" Æ double-speed 27 MHz, "H" Æ ordinary 13.5 MHz
Input pin for testing. Normally "L". Internally pulled down.
Sleep mode setting pin. Normally "L". Internally pulled down.
Input pin for testing. Normally "L". Internally pulled down.
2
2
C-bus clock pin
C-bus data pin
0: composite
1: S video
00: ITU-R601
01: Square Pixel
10: 4Fsc (only for NTSC)
11: none
Description
MODE[2]
0: NTSC
1: PAL
MSM7661B
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