ml87v2104 Oki Semiconductor, ml87v2104 Datasheet - Page 41
![no-image](/images/no-image-200.jpg)
ml87v2104
Manufacturer Part Number
ml87v2104
Description
Display Controller With Built-in Display Memory And Jpeg
Manufacturer
Oki Semiconductor
Datasheet
1.ML87V2104.pdf
(46 pages)
- Current page: 41 of 46
- Download datasheet (272Kb)
AC Characteristics
*1 Values for the output signal timing characteristics have been measured at the VDD1/VDD2 points.
*2 Activate the clock signal to be input to the REFCLK pin by the time the specified voltage is reached after power
OKI Semiconductor
is turned on.
Output hold time
Operating frequency (internal clock)
(CP → )
REFCLK “H” level pulse width
REFCLK “L” level pulse width
Output delay time (BCLK → )
BCLK “H” level pulse width
BCLK “L” level pulse width
Input setup time ( → BCLK)
Input hold time ( → BCLK)
REFCLK clock period
BCLK clock period
Parameter
CP period = tCK2
(VDD1 = 3.3 V ± 0.3 V, VDD2 = VDDP = 2.0 V ± 0.15 V, VSS = 0 V, Ta = 0 to 70 ° C)
*1
Symbol
tWH1
tWH2
tHCP
tWL1
tWL2
tCK1
tPD1
tCK2
fope
tS1
tH1
tCK2 = tCK2(max)
CL = 15pF
CL = 15pF
Condition
Min.
30
12
12
36
14
14
5
5
5
0
Max.
56.0
15
10
PEDL87V3116-02
ML87V3116
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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