92hd88b4x5ndg Integrated Device Technology, 92hd88b4x5ndg Datasheet - Page 34
92hd88b4x5ndg
Manufacturer Part Number
92hd88b4x5ndg
Description
Single Chip Pc Audio System Codec+mono Speaker Amplifier+capless Hp+ldo
Manufacturer
Integrated Device Technology
Datasheet
1.92HD88B4X5NDG.pdf
(277 pages)
- Current page: 34 of 277
- Download datasheet (4Mb)
IDT PROPRIETARY / IDT
SINGLE CHIP PC AUDIO SYSTEM, CODEC+SPEAKER AMPLIFIER+CAPLESS HP+LDO
92HD88
SINGLE CHIP PC AUDIO SYSTEM, CODEC+SPEAKER AMPLIFIER+CAPLESS HP+LDO
2.19. GPIO
GPIO
#
0
1
2
2.19.1. GPIO Pin mapping and shared functions
2.19.2. SPDIF/Digital Microphone/GPIO Selection
2.19.3. Digital Microphone/GPIO Selection
Pin
38
2
3
CONFIDENTIAL
Supply SPDIF
DVDD
DVDD
DVDD
The BTL amplifier includes thermal management circuitry. When the CODEC reaches a temperature
of about 135 degrees, the output amplitude of the BTL amp is gradually lowered until the tempera-
ture falls below 135.
Maximum gain for the BTL amplifier is programmable. The following 4 gain settings relative to a
nominal line output are desired: +6.5dB, +9.5dB, +14.5dB and +16.5dB. Absolute gain may vary and
the suggested accuracy is +/-1.5dB. The gain is exposed in a vendor specific widget and is intended
to mimic the pin programmable gain implemented in discrete BTL amplifiers commonly used in note-
book computers.
3 functions are available on the DMIC_1/GPIO0/SPDIFOUT1 pin (pin 38). To determine which func-
tion is enabled, the order of precedence is followed:
1. If the GPIOs are enabled, they override both SPDIF_OUT and Digital Mics
2. If the GPIOs are not enabled through the AFG, then at reset, the pin is pulled low by an internal
3. If the port is enabled as an input, the digital microphones will be used.
4. If the port is enabled as an output, the SPDIF output will be used.
5. In the event that the port is enabled as an input and an output, the port will be an output and the
2 functions are available on the DMIC_CLK/GPIO1 (pin 2) and the DMIC_0/GPIO2 (pin 3) pins. To
determine which function is enabled, the order of precedence is followed:
1. If GPIOs are not enabled through the AFG, then at reset, pins 2 and 4 are pulled low by an inter-
2. If the GPIO 1 is enabled, the 2 DMIC pins become mute (unless programmed for GPIO or SPDIF
3. If GPIO2 is enabled through the AFG, pin 3 becomes a GPIO and is pulled low by an internal
4. If the port is enabled as an input, the digital microphones will be used.
5. If the port is not enabled as an input or if the pin is configured as a GPIO, the digital microphone
pull-down resistor.
Digital Mic path will be mute.
nal pull-down resistor.
use) and pin 2 becomes an internal pull-down.
pull-down resistor.
path will be mute.
In
SPDIF
Out
YES
YES
YES
GPI/O
YES
GPI
34
GP
O
VrefOut
IN
IN
DMIC
CLK
VOL
92HD88
Pull
Up
Pull
Down
50K
50K
50K
PC AUDIO
V 0.94 07/11
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