zl30111 Zarlink Semiconductor, zl30111 Datasheet - Page 12

• Manufacturer Part Number: zl30111
• Description: Pots Line Card Pll
• Manufacturer: Zarlink Semiconductor

5.0
This section contains ZL30111 application specific details for power supply decoupling, reset operation, clock and
crystal operation.
5.1
Jitter levels on the ZL30111 output clocks may increase if the device is exposed to excessive noise on its power
pins. For optimal jitter performance, the ZL30111 device should be isolated from noise on power planes connected
to its 3.3 V and 1.8 V supply pins. For recommended common layout practices, refer to Zarlink Application Note
ZLAN-178.
5.2
The ZL30111 can use either a clock or crystal as the master timing source.
5.2.1
When selecting a clock oscillator, numerous parameters must be considered. This includes absolute frequency,
frequency change over temperature, output rise and fall times, output levels, duty cycle and phase noise.
The output clock should be connected directly (not AC coupled) to the OSCi input of the ZL30111, and the OSCo
output should be left open as shown in Figure 5.
Power Supply Decoupling
Master Clock
Applications
Clock Oscillator
1
2
3
4
Frequency
Tolerance
Rise & fall time
Duty cycle
ZL30111
Table 1 - Clock Oscillator Specification
Figure 5 - Clock Oscillator Circuit
OSCo
Zarlink Semiconductor Inc.
OSCi
No Connection
ZL30111
20 MHz
as required (better than +/-50ppm)
< 8 ns
40% to 60%
12
20 MHz OUT
+3.3 V
+3.3 V
GND
0.1 µF
Data Sheet