zl30146 Zarlink Semiconductor, zl30146 Datasheet - Page 2

• Manufacturer Part Number: zl30146
• Description: Synce Sonet/sdh Line Card Pll
• Manufacturer: Zarlink Semiconductor

1.0
The ZL30146 OC-192/STM-64 PDH/SONET/SDH/Synchronous Ethernet Network Interface Synchronizer is a
highly integrated device that provides timing for both PDH/SONET/SDH and Ethernet network interface cards. A
functional block diagram is shown in Figure 1.
This device is ideally suited for designs that require both a transmit timing path (backplane to PHY) and a receive
timing path (PHY to backplane). Each path is controlled with separate DPLLs (Tx DPLL, Rx DPLL) which are both
independently configurable through the serial interface (SPI or I
in Figure 2. In this application, the ZL30146 translates the 19.44 MHz clock from the telecom rate backplane
(system timing bus), translates the frequency to 622.08 MHz or 156.25 MHz for the PHY Tx clock, and filters the
jitter to ensure compliance with the related standards. On the receive path, the Rx DPLL and the programmable
synthesizer translate the line recovered clock (8 kHz or 25 MHz) from the PHY to the 19.44 MHz telecom
backplane (line recovered timing) for the central timing cards. The ZL30146 allows easy integration of Ethernet line
rates with today’s telecom backplanes.
C e n tra l
T im in g
1 9 .4 4 M H z
C a rd
Functional Description
L in e C a rd
8 k H z
O C -1 9 2
P
S yn th
D P L L
P ro g
R x
P
S
Z L 3 0 1 4 6
Z L 3 0 1 4 2
S
A
P H Y
P
D P L L
D P L L
A P L L
B IT S A
T x
Figure 2 - Typical Application of the ZL30146
6 2 2 .0 8 M H z
A
1 9 .4 4 M H z
L in e R e c o v e r e d T im in g
B
S y s te m T im in g B u s
Zarlink Semiconductor Inc.
X O V E R
ZL30146
1 5 6 .2 5 M H z
1 9 .4 4 M H z
2
B IT S B
B
B
D P L L
A P L L
D P L L
2
C). A typical application of the ZL30146 is shown
T x
P H Y
P S
A
Z L 3 0 1 4 2
Z L 3 0 1 4 6
S
S
S y n th
D P L L
P ro g
L in e C a rd
R x
1 0 G b E
2 5 M H z
Short Form Data Sheet
1 9 .4 4 M H z
P
C e n tra l
T im in g
C a rd
B a c k p la n e
T e le c o m