mt9094apr1 Zarlink Semiconductor, mt9094apr1 Datasheet - Page 2

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mt9094apr1

Manufacturer Part Number
mt9094apr1
Description
Fully Featured Digital Telephone Circuit With Embedded Dsp For Tone Generation And Hands Free Operation
Manufacturer
Zarlink Semiconductor
Datasheet
Pin Description
Pin #
10
12
11
1
2
3
4
5
6
7
8
9
PWRST Power-up Reset (Input). CMOS compatible input with Schmitt Trigger (active low).
Name
DSTo
DSTi
V
V
V
M+
NC
C4i
NC
F0i
IC
Bias
SSD
Ref
Non-Inverting Microphone (Input). Non-inverting input to microphone amplifier from the handset
microphone.
No Connect. No internal connection to this pin.
Bias Voltage (Output). (V
µF capacitor to V
Reference voltage for codec (Output). Nominally [(V
capacitor to V
Internal Connection. Tie externally to V
ST-BUS Serial Stream (Input). 2048 kbit/s input stream composed of 32 eight bit channels; the first
four of which are used by the MT9094. Input level is TTL compatible.
ST-BUS Serial Stream (Output). 2048 kbit/s output stream composed of 32 eight bit channels. The
MT9094 sources digital signals during the appropriate channel, time coincident with the channels used
for DSTi.
4096 kHz Clock (Input). CMOS level compatible.
Frame Pulse (Input). CMOS level compatible. This input is the frame synchronization pulse for the
2048 kbit/s ST-BUS stream.
Digital Ground. Nominally 0 volts.
No Connect. No internal connection to this pin.
SSA
.
SSA
DATA 2
DATA 1
VSSD
SCLK
DSTo
.
DSTi
WD
C4i
NC
F0i
CS
DD
Figure 2 - Pin Connections
/2) volts is available at this pin for biasing external amplifiers. Connect 0.1
Zarlink Semiconductor Inc.
7
8
9
10
11
12
13
14
15
16
17
MT9094
44 PIN PLCC
2
SS
for normal operation.
Description
39
38
37
36
35
34
33
32
31
30
29
DD
/2)-1.5] volts. Used internally. Connect 0.1 µF
SPKR+
SPKR-
HSPKR+
HSPKR-
VDD
BP
S12
S11
S10
S9
S8
Data Sheet

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