zl50017 Zarlink Semiconductor, zl50017 Datasheet - Page 12

• Manufacturer Part Number: zl50017
• Description: 1 K Digital Switch
• Manufacturer: Zarlink Semiconductor

B6, C6, D5,
D4, B4, B3,
C5, C4, E3,
C2, B2, D2,
F3, F4, E2,
PBGA Pin
M14, R13
Number
B10
B11
F2
LQFP Pin
179, 180,
181, 182,
183, 184,
185, 187,
198, 200,
201, 202,
203, 204,
205, 206
Number
46, 48
155
154
MODE_4M0,
MODE_4M1
Pin Name
STi0 - 15
CKi
FPi
Zarlink Semiconductor Inc.
4 M Input Clock Mode 0 to 1 (5 V-Tolerant Input with internal
pull-down) These two pins should be tied together.
See Table 4, “Control Register (CR) Bits” on page 28 for CKi and
FPi selection using the CKIN1 - 0 bits.
ST-BUS/GCI-Bus Frame Pulse Input (5 V-Tolerant
Schmitt-Triggered Input)
This pin accepts the frame pulse which stays active for 61 ns,
122 ns or 244 ns at the frame boundary. The frame pulse
frequency is 8 kHz. The frame pulse associated with the CKi must
be applied to this pin. By default, the device accepts a negative
frame pulse in ST-BUS format, but it can accept a positive frame
pulse instead if the FPINP bit is set high in the Control Register
(CR). It can accept a GCI-formatted frame pulse by programming
the FPINPOS bit in the Control Register (CR) to high.
ST-BUS/GCI-Bus Clock Input (5 V-Tolerant Schmitt-Triggered
Input)
This pin accepts a 4.096 MHz, 8.192 MHz or 16.384 MHz clock.
The clock frequency applied to this pin must be twice the highest
input or output data rate. The exception is, when data is running
at 16.384 Mbps, a 16.384 MHz clock must be used.
By default, the clock falling edge defines the input frame
boundary, but the device allows the clock rising edge to define the
frame boundary by programming the CKINP bit in the Control
Register (CR).
Serial Input Streams 0 to 15 (5 V-Tolerant Inputs with Internal
Pull-downs)
The data rate of all the input streams are programmed through the
“Data Rate Selection Register” on page 31. In the 2.048 Mbps
mode, these pins accept serial TDM data streams at 2.048 Mbps
with 32 channels per frame. In the 4.096 Mbps mode, these pins
accept serial TDM data streams at 4.096 Mbps with 64 channels
per frame. In the 8.192 Mbps mode, these pins accept serial TDM
data streams at 8.192 Mbps with 128 channels per frame. In the
16.384 Mbps mode, these pins accept serial TDM data streams
at 16.384 Mbps with 256 channels per frame.
MODE
ZL50017
_4M1
0
1
0
1
12
MODE
_4M0
0
1
1
0
Description
CKi = 8.192 MHz or 16.384 MHz
CKi = 4.096 MHz
Operation
Reserved
Reserved
Data Sheet