zl50050 Zarlink Semiconductor, zl50050 Datasheet - Page 44

• Manufacturer Part Number: zl50050
• Description: 8 K-channel Digital Switch With High Jitter Tolerance, Per Stream Rate Conversion 2, 4, 8, 16, Or 32 Mbps , And 32 Inputs And 32 Outputs
• Manufacturer: Zarlink Semiconductor

8.3
The RESET pin is used to reset the device. When set LOW, an asynchronous reset is applied to the device. It is then
synchronized to the internal clock. During the reset period, depending on the state of input pins LORS and BORS,
the output streams LSTo0-15 and BSTo0-15 are set to HIGH or high impedance, and all internal registers and
counters are reset to the default state.
The RESET pin must remain LOW for two input clock cycles (C8i) to guarantee a synchronized reset release. A
delay of an additional 250 µs must also be waited before the first microprocessor access is performed following
the de-assertion of the RESET pin; this delay is required for determination of the frame pulse format.
In addition, the reset signal must be de-asserted less than 12 µs after the frame boundary or more than 13 µs after
the frame boundary, as illustrated in Figure 21. This can be achieved, for example, by synchronizing the
de-assertion of the reset signal with the input frame pulse FP8i.
9.0
The device includes two connection memories, the Local Connection Memory and the Backplane Connection
Memory.
9.1
The Local Connection Memory (LCM) is a 16-bit wide memory with 4,096 memory locations to support the Local
output port. The most significant bit of each word, bit[15], selects the source stream from either the Backplane
(LSRC = LOW) or the Local (LSRC = HIGH) port and determines the Backplane-to-Local or Local-to-Local data
routing. Bits[14:13] select the control modes of the Local output streams, the per-channel Message Mode and the
per-channel high impedance output control modes. In Connection Mode (bit[14] = LOW), bits[12:0] select the
source stream and channel number as detailed in Table 8. In Message Mode (bit[14] = HIGH), bits[12:8] are unused
and bits[7:0] contain the message byte to be transmitted. Bit[13] must be HIGH for Message Mode to ensure that
the output channel is not tri-stated.
4. Use the Block Programming Mode to initialize the Local and the Backplane Connection Memories. Refer to
5. Set ODE pin to HIGH after the connection memories are programmed to ensure that bus contention will not
Section 9.3, Connection Memory Block Programming.
occur at the serial stream outputs.
(case 2)
Reset
(case 1)
Local Connection Memory
RESET
RESET
Connection Memory
FP8i
RESET assertion
De-assertion of RESET must not fall within this window
12 µs
13 µs
Figure 21 - Hardware RESET De-assertion
RESET de-assertion
Zarlink Semiconductor Inc.
ZL50050
44
Data Sheet