zl50050 Zarlink Semiconductor, zl50050 Datasheet - Page 80

• Manufacturer Part Number: zl50050
• Description: 8 K-channel Digital Switch With High Jitter Tolerance, Per Stream Rate Conversion 2, 4, 8, 16, Or 32 Mbps , And 32 Inputs And 32 Outputs
• Manufacturer: Zarlink Semiconductor

16.0
AC Electrical Characteristics
Input and Output Clock Timing
10
11
12
1
2
3
4
5
6
7
8
9
1
2
3
FP8i, Input Frame Pulse Width
Input Frame Pulse Setup Time
(before C8i clock falling/rising edge)
Input Frame Pulse Hold Time
(from C8i clock falling/rising edge)
C8i Clock Period (Average value, does not
consider the effects of jitter)
C8i Clock Pulse Width High
C8i Clock Pulse Width Low
C8i Clock Rise/Fall Time
C8i Cycle to Cycle Variation
(This values is with respect to the typical C8i
Clock Period, and using mid-bit sampling)
Output Frame Boundary Offset
FP8o Frame Pulse Width
FP8o Output Delay
(from frame pulse edge to output frame
boundary)
FP8o Output Delay
(from output frame boundary to frame pulse
edge)
CMOS Threshold
Rise/Fall Threshold Voltage High
Rise/Fall Threshold Voltage Low
AC Electrical Characteristics
Characteristics
Characteristic
Timing Parameter Measurement: Voltage Levels
Zarlink Semiconductor Inc.
Sym.
V
V
V
HM
CT
LM
ZL50050
80
t
t
t
t
t
t
FPFBF8_244
FPFBF8_122
FBFPF8_244
FBFPF8_122
0.5V
0.7V
0.3V
OFPW8_244
OFPW8_122
t
t
t
t
t
t
t
IFPW244
IFPW122
t
IFPH244
IFPH122
IFPS244
t
rIC
IfPS122
OFBOS
Level
Sym.
CCVIC
t
t
t
ICP
ICH
ICL
, t
DD_IO
DD_IO
DD_IO
fIC
Min.
210
120
-7.0
-8.5
224
117
117
117
Units
10
50
50
58
58
5
5
0
0
0
V
V
V
Typ.
244
122
122
244
122
122
122
61
61
61
61
3.0V < V
3.0V < V
3.0V < V
2
7
Max.
350
220
124
264
127
127
127
110
110
7.0
8.5
9.5
60
60
70
70
64
64
3
DD_IO
DD_IO
DD_IO
Conditions
Units
< 3.6V
< 3.6V
< 3.6V
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Data Sheet
32 Mbps
16 Mbps
or lower.
FPW =1
FPW=0
C
FPW =1
FPW=0
C
FPW =1
FPW=0
C
Notes
L
L
L
=60pF
=60pF
=60pF