zl50418 Zarlink Semiconductor, zl50418 Datasheet - Page 116

• Manufacturer Part Number: zl50418
• Description: Managed 16-port 10/100 M + 2-port 1 G Ethernet Switch
• Manufacturer: Zarlink Semiconductor

15.1.2
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
V
W
Y
AA
AB
AC
AD
AE
AF
AG
AH
AJ
1
LA_C
LK
AGND
SCLK
AVCC
LB_C
LK
LB_D
46
LB_D
43
LB_D
40
LB_D
37
LB_D
34
LB_A
18
LB_A
15
LB_A
10
LB_A
5
LB_O
E0_
LB_A
DSC_
LB_D
15
LB_D
14
LB_D
11
LB_D
8
LB_D
5
LB_D
2
M0_T
XEN
M0_R
XD1
M1_T
XEN
1
2
LA_D
1
LA_D
0
LA_D
17
LA_D
16
RESI
N_
RESE
TOUT
_
LB_D
45
LB_D
42
LB_D
39
LB_D
36
LB_D
33
LB_A
19
LB_A
16
LB_A
11
LB_A
6
LB_O
E1_
LB_O
E_
LB_A
3
LB_D
13
LB_D
10
LB_D
7
LB_D
4
LB_D
1
M0_T
XD0
M0_R
XD0
M1_T
XD0
M1_R
XD0
2
Encapsulated view in managed mode
3
LA_D
4
LA_D
3
LA_D
2
LA_D
19
LA_D
18
SCAN
EN
LB_D
47
LB_D
44
LB_D
41
LB_D
38
LB_D
35
LB_D
32
LB_A
20
LB_A
17
LB_A
12
LB_A
7
T_MO
DE0
LB_W
E_
LB_A
4
LB_D
12
LB_D
9
LB_D
6
LB_D
3
LB_D
0
M0_T
XD1
M0_C
RS
M1_T
XD1
M1_C
RS
M1_R
XD1
3
4
LA_D
7
LA_D
6
LA_D
5
LA_D
21
LA_D
20
LB_D
63
LB_D
61
LB_D
59
LB_D
57
LB_D
55
LB_D
53
LB_D
51
LB_D
49
LB_W
E0_
LB_A
13
LB_A
8
LB_D
31
LB_D
29
LB_D
27
LB_D
25
LB_D
23
LB_D
21
LB_D
19
LB_D
17
M3_T
XD1
M3_T
XD0
M2_T
XD1
M2_T
XD0
M2_T
XEN
4
5
LA_D
10
LA_D
9
LA_D
8
LA_D
23
LA_D
22
LB_D
62
LB_D
60
LB_D
58
LB_D
56
LB_D
54
LB_D
52
LB_D
50
LB_D
48
LB_W
E1_
LB_A
14
LB_A
9
LB_D
30
LB_D
28
LB_D
26
LB_D
24
LB_D
22
LB_D
20
LB_D
18
LB_D
16
M3_T
XEN
M3_C
RS
M2_C
RS
M2_R
XD0
M2_R
XD1
5
6
LA_D
13
LA_D
12
LA_D
11
LA_D
25
LA_D
24
VCC
VCC
VCC
VCC
VCC
M3_R
XD0
M3_R
XD1
M4_T
XD1
M4_T
XD0
M4_T
XEN
6
7
LA_D
15
LA_D
14
LA_A
3
LA_D
27
LA_D
26
M5_T
XD1
M5_T
XD0
M4_C
RS
M4_R
XD0
M4_R
XD1
7
8
LA_A
4
LA_A
DSC_
LA_O
E_
LA_D
29
LA_D
28
M5_T
XEN
M5_C
RS
M6_T
XD1
M6_T
XD0
M6_T
XEN
8
9
LA_O
E0_
LA_O
E1_
LA_W
E_
LA_D
31
LA_D
30
M5_R
XD0
M5_R
XD1
M6_C
RS
M6_R
XD0
M6_R
XD1
9
10
LA_A
8
LA_A
7
T_MO
DE1
LA_A
6
LA_A
5
VDD
VDD
VDD
VDD
M8_T
XD1
M8_T
XD0
M7_T
XD1
M7_T
XD0
M7_T
XEN
10
11
LA_A
13
LA_A
12
LA_A
11
LA_A
10
LA_A
9
M8_T
XEN
M8_C
RS
M7_C
RS
M7_R
XD0
M7_R
XD1
11
Zarlink Semiconductor Inc.
12
LA_A
16
LA_A
15
LA_A
14
LA_W
E0_
LA_W
E1_
VDD VDD
VSS VSS VSS VSS VSS VSS VSS
VSS VSS VSS VSS VSS VSS VSS
VSS VSS VSS VSS VSS VSS VSS
VSS VSS VSS VSS VSS VSS VSS
VSS VSS VSS VSS VSS VSS VSS
VSS VSS VSS VSS VSS VSS VSS
VSS VSS VSS VSS VSS VSS VSS
VDD VDD
M8_R
XD0
M8_R
XD1
M9_T
XD1
M9_T
XD0
M9_T
XEN
12
ZL50418
13
LA_A
19
LA_A
18
LA_A
17
LA_D
49
LA_D
48
VCC VCC VCC VCC VCC
VCC VCC VCC VCC VCC
M10_
TXD1
M10_
TXD0
M9_C
RS
M9_R
XD0
M9_R
XD1
13
116
14
LA_D
33
LA_D
32
LA_A
20
LA_D
51
LA_D
50
M10_
TXEN
M10_
CRS
M11_
TXD1
M11_
TXD0
M11_
TXEN
14
15
LA_D
36
LA_D
35
LA_D
34
LA_D
53
LA_D
52
M10_
RXD0
M10_
RXD1
M11_
CRS
M11_
RXD0
M11_
RXD1
15
16
LA_D
39
LA_D
38
LA_D
37
LA_D
55
LA_D
54
M13_
TXD1
M13_
TXD0
M12_
TXD1
M12_
TXD0
M12_
TXEN
16
17
LA_D
42
LA_D
41
LA_D
40
LA_D
57
LA_D
56
VDD VDD
VDD VDD
RESE
RVED
M13_
CRS
M12_
CRS
M12_
RXD0
M12_
RXD1
17
18
LA_D
45
LA_D
44
LA_D
43
LA_D
59
LA_D
58
M15_
TXD1
M13_
RXD1
M14_
TXD1
M14_
TXD0
M14_
TXEN
18
19
P_DA
TA13
P_DA
TA14
P_DA
TA15
LA_D
61
LA_D
60
RESE
RVED
M14_
CRS
M15_
TXD0
M14_
RXD0
M14_
RXD1
19
20
P_DA
TA10
P_DA
TA11
P_DA
TA12
LA_D
63
P_DA
TA8
VDD
VDD
VDD
VDD
M15_
TXEN
RESE
RVED
RESE
RVED
M13_
RXD0
RESE
RVED
20
21
P_DA
TA7
LA_D
62
P_DA
TA9
LA_D
47
LA_D
46
M15_
RXD0
M15_
RXD1
RESE
RVED
M15_
CRS
M13_
TXEN
21
22
22
P_DA
TA4
P_DA
TA5
P_A2
SCAN
COL
RESE
RVED
RESE
RVED
RESE
RVED
RESE
RVED
RESE
RVED
23
23
P_DA
TA1
P_DA
TA2
P_DA
TA3
SCAN
CLK
SCAN
LINK
RESE
RVED
RESE
RVED
RESE
RVED
RESE
RVED
RESE
RVED
24
P_A0 P_A1 P_WE
P_DA
TA6
P_DA
TA0
TSTO
UT14
TSTO
UT15
VCC
VCC
VCC
VCC
VCC
RESE
RVED
RESE
RVED
RESE
RVED
RESE
RVED
RESE
RVED
24
25
P_INTP_RD
P_CS
TSTO
UT13
M26_
CRS
M26_
TXCL
K
RESE
RVED
RESE
RVED
RESE
RVED
M26_
TXD9
M26_
TXD4
M26_
TXD7
M26_
TXD2
M26_
TXD0
M25_
CRS
M25_
TXCL
K
RESE
RVED
RESE
RVED
RESE
RVED
M25_
RXD6
M25_
TXD6
M25_
TXD4
M25_
TXD2
M25_
TXD0
RESE
RVED
RESE
RVED
RESE
RVED
RESE
RVED
RESE
RVED
25
Data Sheet
26
TSTO
UT11
TSTO
UT12
M26_
TXER
M26_
TXEN
RESE
RVED
RESE
RVED
RESE
RVED
M26_
TXD8
M26_
TXD6
M26_
TXD5
M26_
TXD3
M26_
TXD1
M25_
TXER
M25_
TXEN
RESE
RVED
RESE
RVED
RESE
RVED
M25_
TXD9
M25_
TXD7
M25_
TXD5
M25_
TXD3
M25_
TXD1
RESE
RVED
RESE
RVED
RESE
RVED
RESE
RVED
RESE
RVED
26
27
TSTO
UT7
TSTO
UT8
TSTO
UT9
TSTO
UT10
SCAN
MOD
E
M26_
MTXC
LK
RESE
RVED
RESE
RVED
M26_
RXD9
M26_
RXD6
M26_
RXD3
M26_
RXD0
M25_
MTXC
LK
RESE
RVED
RESE
RVED
M25_
RXD9
M25_
TXD8
M25_
RXD3
M25_
RXD0
RESE
RVED
RESE
RVED
RESE
RVED
RESE
RVED
RESE
RVED
RESE
RVED
RESE
RVED
27
28
TSTO
UT3
TSTO
UT4
TSTO
UT5
TSTO
UT6
M26_
RXDV
M26_
RXER
RESE
RVED
RESE
RVED
M26_
RXD7
M26_
RXD4
M26_
RXD1
MDIO
MDC
M25_
RXDV
M25_
RXER
RESE
RVED
RESE
RVED
M25_
RXD7
M25_
RXD4
M25_
RXD1
RESE
RVED
RESE
RVED
RESE
RVED
RESE
RVED
RESE
RVED
RESE
RVED
28
29
TSTO
UT0
TSTO
UT1
TSTO
UT2
M26_
RXCL
K
M26_
COL
RESE
RVED
RESE
RVED
M26_
RXD8
M26_
RXD5
M26_
RXD2
GREF
_CLK
1
GREF
_CLK
0
M_CL
K
M25_
RXCL
K
M25_
COL
RESE
RVED
RESE
RVED
M25_
RXD8
M25_
RXD5
M25_
RXD2
RESE
RVED
RESE
RVED
RESE
RVED
RESE
RVED
29