zl50416 Zarlink Semiconductor, zl50416 Datasheet - Page 17
zl50416
Manufacturer Part Number
zl50416
Description
Managed 16-port 10/100 M + 2-port 1 G Ethernet Switch
Manufacturer
Zarlink Semiconductor
Datasheet
1.ZL50416.pdf
(140 pages)
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2.6.1
2.6.2
All registers in ZL50416 can be modified through this synchronous serial interface.
3.0
3.1
When a frame arrives, it is assigned a handle in memory by the Frame Control Buffer Manager (FCB Manager). An
FCB handle will always be available, because of advance buffer reservations.
The memory (SRAM) interface is a 64-bit bus connected to SRAM bank. The Receive DMA (RxDMA) is
responsible for multiplexing the data and the address. On a port’s “turn,” the RxDMA will move 8 bytes (or up to the
end-of-frame) from the port’s associated RxFIFO into memory (Frame Data Buffer, or FDB).
Once an entire frame has been moved to the FDB, and a good end-of-frame (EOF) has been received, the Rx
interface makes a switch request. The RxDMA arbitrates among multiple switch requests.
The switch request consists of the first 64 bytes of a frame, containing among other things, the source and
destination MAC addresses of the frame. The search engine places a switch response in the switch response
queue of the frame engine when done. Among other information, the search engine will have resolved the
destination port of the frame and will have determined that the frame is unicast.
Unicast Data Frame Forwarding
ZL50416 Data Forwarding Protocol
STROBE-
Write Command
Read Command
STROBE-
AUTOFD-
D0
D0
START
START
A0
A0 A1 A2
A1
A2
ADDRESS
ADDRESS
...
...
A9
A9
A10
A10
A11
Figure 4 - Write Command
Figure 5 - Read Command
COMMAND
A11
COMMAND
Zarlink Semiconductor Inc.
W
R
ZL50416
D0 D1 D2 D3 D4 D5 D6 D7
D0 D1 D2 D3 D4 D5 D6 D7
17
DATA
DATA
2 Extra clocks after last
transfer
Data Sheet
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