zl50416 Zarlink Semiconductor, zl50416 Datasheet - Page 34

• Manufacturer Part Number: zl50416
• Description: Managed 16-port 10/100 M + 2-port 1 G Ethernet Switch
• Manufacturer: Zarlink Semiconductor

7.8.1
Summarizing the two examples of local dropping discussed earlier in this chapter:
If a queue is a delay-bounded queue, we have a multilevel WRED drop scheme, designed to control delay and
partition bandwidth in case of congestion.
If a queue is a WFQ-scheduled queue, we have a multilevel WRED drop scheme, designed to prevent congestion.
In addition to these reasons for dropping, we also drop frames when global buffer space becomes scarce. The
function of buffer management is to make sure that such dropping causes as little blocking as possible.
7.9
Because frame loss is unacceptable for some applications, the ZL50416 provides a flow control option. When flow
control is enabled, scarcity of buffer space in the switch may trigger a flow control signal; this signal tells a source
port that is sending a packet to this switch, to temporarily hold off.
While flow control offers the clear benefit of no packet loss, it also introduces a problem for quality of service. When
a source port receives an Ethernet flow control signal, all microflows originating at that port, well-behaved or not,
are halted. A single packet destined for a congested output can block other packets destined for uncongested
outputs. The resulting head-of-line blocking phenomenon means that quality of service cannot be assured with high
confidence when flow control is enabled.
In the ZL50416, each source port can independently have flow control enabled or disabled. For flow control
enabled ports, by default all frames are treated as lowest priority during transmission scheduling. This is done so
that those frames are not exposed to the WRED Dropping scheme. Frames from flow control enabled ports feed to
only one queue at the destination, the queue of lowest priority. What this means is that if flow control is enabled for
ZL50416 Flow Control Basics
Dropping When Buffers Are Scarce
reservation
reservation
temporary
per-class
Figure 12 - Buffer Partition Scheme Used to Implement Buffer Management
(16 10/100, CPU)
reservations
per-source
Zarlink Semiconductor Inc.
ZL50416
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shared pool
S
Data Sheet
: