zl50211 Zarlink Semiconductor, zl50211 Datasheet - Page 16

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zl50211

Manufacturer Part Number
zl50211
Description
256 Channel Voice Echo Canceller
Manufacturer
Zarlink Semiconductor
Datasheet

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2.3
In this configuration, the two echo cancellers from the same group are internally cascaded into one 128
milliseconds echo canceller. See Figure 8. This configuration uses only one timeslot on PORT1 and PORT2 and
the second timeslot normally associated with ECB contains quiet code.
Extended Delay configuration is selected by writing a “1” into the ExtDl bit in Echo Canceller A, Control Register 1.
For a given group, only Echo Canceller A, Control Register 1, has the ExtDl bit. For Echo Canceller B Control
Register 1, Bit 0 must always be set to zero.
Table 4 shows the 16 groups of 2 cancellers that can each be configured into 64 ms or 128 ms echo tail capacity.
3.0
Each echo canceller has four functional states: Mute, Bypass, Disable Adaptation and Enable Adaptation.
3.1
In Normal and in Extended Delay configurations, writing a “1” into the MuteR bit replaces Rin with quiet code which
is applied to both the Adaptive Filter and Rout. Writing a “1” into the MuteS bit replaces the Sout PCM data with
quiet code.
In Back-to-Back configuration, writing a “1” into the MuteR bit of Echo Canceller A, Control Register 2, causes
quiet code to be transmitted on Rout. Writing a “1” into the MuteS bit of Echo Canceller A, Control Register 2,
causes quiet code to be transmitted on Sout.
In Extended Delay and in Back-to-Back configurations, MuteR and MuteS bits of Echo Canceller B must always be
“0”. Refer to Figure 4 and to Control Register 2 for bit description.
Extended Delay Configuration
Mute
Echo Canceller Functional States
(quiet code)
+Zero
Figure 8 - Extended Delay Configuration (128 ms)
complement
echo
path A
Table 2 - Quiet PCM Code Assignment
PORT2
LINEAR
16 bits
Rout
0000
Sin
2’s
hex
channel A
channel A
ECA
Zarlink Semiconductor Inc.
MAGNITUDE
ZL50211
A-Law
µ-Law
Adaptive Filter
SIGN/
80
16
(128 ms)
hex
-
+
µ-Law
FF
hex
PORT1
CCITT (G.711)
Sout
Rin
A-Law
D5
hex
Data Sheet

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