bcm5464r Broadcom Corp., bcm5464r Datasheet - Page 2

• Manufacturer Part Number: bcm5464r
• Description: Bcm5464r - Quad-port 10/100/1000base-t Gigabit Copper Transceiver
• Manufacturer: Broadcom Corp.

The BCM5464R consists of four complete 10/100/1000BASE-T Gigabit
Ethernet transceivers integrated on a single monolithic CMOS chip, and is
a member of Broadcom’s QuadSquad™ family of quad Gigabit Ethernet
PHYs. The BCM5464R is optimized for low-power and small footprint
size to enable high port density applications. The BCM5464R enables a
new class of cost-effective Gigabit Ethernet equipment by lowering system
cost and reducing power dissipation by nearly 25%, driving the delivery of
Gigabit bandwidth to the desktop.
The BCM5464R’s digital signal processor-based architecture and
advanced power management techniques combine to achieve robust and
low-power operation over the existing Category 5 twisted-pair wiring. The
BCM5464R architecture not only meets the requirements of IEEE’s 802.3,
802.3u, and 802.3ab standards, but maintains the industry’s highest level of
margin over IEEE requirements for echo, NEXT, and FEXT. Low power is
key to implementing high-density Gigabit switches, and the BCM5464R
has the lowest power in the industry at 750 mW per port. In addition, the
BCM5464R has extremely low EMI emissions, which reduces the design
constraints required to meet EMI radiation specifications.
The BCM5464R supports the RGMII, SGMII, and SerDes MAC
interfaces. The RGMII, SGMII, and Serial SerDes are reduced pin count
(12, 6, and 4, respectively, versus 25) versions of the GMII. The RGMII
clock timing can be adjusted to eliminate the board trace delays required by
the RGMII specification. These reduced pin count interfaces simplify
design and lower system cost by reducing the number of layers required to
route high-density solutions. In addition, these interfaces allow fewer pins
Broadcom
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BROADCOM CORPORATION
16215 Alton Parkway, P.O. Box 57013
Irvine, California 92619-7013
© 2007 by BROADCOM CORPORATION. All rights reserved.
5464R-PB02-R
®
, the pulse logo, Connecting everything
01/15/07
TRD [0:3]± {1:4}*
RDAC {1:2}*
XTALO
XTALI
®
®
PGA
16
, and the Connecting everything logo are among
Negotiation
Generator
Generator
Auto-
Clock
Bias
Automatic
Control
TX DAC
Gain
ADC
BCM5464R Reference Design
O V E R V I E W
Canceller
Registers
Echo
FFE
MII
at the MAC/switch, which reduces the MAC/switch cost by enabling
smaller die sizes than would be possible with full GMII.
This device is another member of Broadcom’s 0.13-µm Gigabit copper
PHY family, joining more than a dozen other quad-port and single-port
PHY products. The 0.13-µm process is the optimal process that offers the
best performance, lowest cost, and lowest power for Gigabit copper
solutions. Devices based on the 0.13-µm process offer an excellent long-
term cost curve, enabling better cost reduction over time compared to older
technologies without requiring the redesign or requalification of a new part.
Each BCM5464R port is fully independent and has individual interface,
control, and status registers, and incorporates a number of advanced
features. A link-quality indicator LED gives installers an instant visual
indication if there are any problems with the wiring plant supporting
operation at the preferred speed. This includes physical wiring defects that
the BCM5464R cannot automatically correct. This includes channel
conditions such as excessive cable length and return loss, crosstalk, echo,
and noise. Broadcom’s cable analyzer software can be used with the device
to provide remote management of the cable and a first level of diagnostics
and fault isolation.
The BCM5464R also has ESD tolerance well above typical industry
standards. This prevents ESD damage not only during manufacturing but
during CESD events in the field. The CESD is an ESD event that occurs
when an electrically-charged network cable is plugged into a network port.
This issue is becoming more prevalent with contemporary cable
installations. The BCM5464R tolerates over 4 kV of CESD.
Canceller
Recovery
Timing &
Decoder
XTALK
Trellis
Phase
DFE/
X3
Decoder/
Encoder
Symbol
SerDes/
Symbol
SGSMII
Aligner
Control
MGMT
MUX
MUX
MII
16
2
2
2
2
2
2
2
2
16
TXD[3:0] {1:4}*
TX_EN {1:4}*
TX_ER {1:4}*
GTX_CLK {1:4}*
TX_CLK {1:4}*
SGIN±
SCLK±
SGOUT±
COL {1:4}*
CRS {1:4}*
RX_CLK {1:4}*
RX_DV {1:4}*
RX_ER {1:4}*
RXD[3:0] {1:4}*
MDIO
MDC
NTR {1:4}*
Modes
Phone: [phone]
Fax: [phone]
E-mail: [e-mail]
Web: www.broadcom.com