zic2410 California Eastern Laboratories, zic2410 Datasheet - Page 26

• Manufacturer Part Number: zic2410
• Description: Single-chip Solution, Compliant With Zigbee
• Manufacturer: California Eastern Laboratories

1.7 ON­CHIP PERIPHERALS
On-chips peripherals in ZIC2410 are as follows.
1.7.1 TIMER 0/1
The Embedded MCU has two 16-bit timers which are compatible with Intel 8051 MCU (Timer0,
Timer1). These timers have 2 modes: one is operated as a timer and the other is operated as a
counter. When it is operated as a timer, there are 4 operating modes.
Each timer is a 16-bit timer and consists of two 8-bit register. Therefore, the counter can be
either 8-bit or 16-bit set by the operating mode.
In counter mode, the input signal T0 (P3.4) and T1 (P3.5) are sampled once every 12 cycles of
the system clock. If the sampled value is changed from ‘1’ to ‘0’, the internal counter is
incremented. In this time, the duty cycle of T0 and T1 doesn’t affect the increment. Timer0 and
Timer1 are accessed by using 6 SFR’s.
These registers are used to control each timer function and monitor each timer status.
The following table describes timer registers and modes.
TCON (TIMER CONTROL REGISTER, 0x88)
Bit
7
6
5
4
3
Rev A
• TIMER 0/1
• TIMER 2/3,PWM 2/3
• Watch-dog timer
• Sleep Timer
• Internal RC Oscillator for Sleep Timer
• Two High-Speed UARTs with Two 16-byte FIFOs (up to 1Mbps)
• SPI Master/Slave Interface
• I2S/PCM Interface with two128-byte FIFOs
• μ-law / a-law / ADPCM Voice Codec
• Random Number Generator
• Quad Decoder
• Internal Voltage Regulator
• 4-channel 8-bit sensor ADC
• On-chip Power-on-Reset
• Temperature Sensor
• Battery Monitoring
Name
TR1
TR0
TF1
TF0
IE1
Timer1 Overflow Flag: When this field is ‘1’, a Timer1 interrupt
occurs. After the Timer1 interrupt service routine is executed, this
field value is cleared by the hardware.
Timer1 Run Control: When this bit is set to ‘1’, Timer1 is enabled.
Timer0 Interrupt Flag: When this field is ‘1’: Interrupt is pending
After Timer0 interrupt service routine is executed, this field is
cleared by hardware.
Timer0 Run: When this bit is set to ‘1’, Timer0 is enabled.
External Interrupt1 Edge Flag: When this field is ‘1’, External
interrupt1 is pending. After the interrupt service routine is executed,
this field is cleared by hardware.
Table 11 – Timer and Timer Mode Registers
Document No. 0005-05-07-00-000
ZIC2410 Datasheet
Descriptions
1.7.1
1.7.2
1.7.3
1.7.4
1.7.5
1.7.6
1.7.7
1.7.8.1
1.7.8.2
1.7.9
1.7.10
1.7.11
1.7.12
1.7.13
1.7.14
1.7.15
R/W
R/W
R/W
R/W
R/W
R/W
Page 26 of 119
Reset
Value
0
0
0
0
0