zic2410 California Eastern Laboratories, zic2410 Datasheet - Page 68

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zic2410

Manufacturer Part Number
zic2410
Description
Single-chip Solution, Compliant With Zigbee
Manufacturer
California Eastern Laboratories
Datasheet
1.9.1 INTERRUPT 
The modem block provides four interrupts to notify the MCU of specific events:
This interrupt notifies the MCU of the completion of a packet reception. When this interrupt has
been generated, the user can check the received data in the RX FIFO.
Also, the quality of the transmission channel is checked by reading this register, which stores
the RSSI information of the received packet.
This interrupt notifies the MCU of the start of a packet reception. When the packet reception
has been started, all the reception is processed by the hardware.
Note: It is recommended that the RX Start Interrupt is not used.
This interrupt notifies the MCU of the completion of a packet transmission. A new packet
cannot be transmitted until a packet transmission is completed. When a communication
channel is busy, a TX End Interrupt can be delayed until a communication channel goes to the
idle state and the transmission is completed successfully
This interrupt notifies the MCU that the modem block has changed from the idle state to the
ready state due to the modem-on request. The modem block is in the idle state when the
supply power is turned on but needs to be changed to the ready state in order to transmit or
receive the packet. This interrupt occurs when the RF block has stabilized following the
modem-on request.
The user can check whether each interrupt described above occurs through the INTSTS
register. The INTCON register can be set to disable any of the interrupts desired.
The modem block provides the INTIDX register with information from the INTSTS register to
check whether an interrupt has occurred. When multiple interrupts occur simultaneously,
INTSTS register will show all the interrupts that have occurred. The INTIDX register notifies
whether an interrupt is enabled in the order based on the priority of the interrupt. When a user
reads the INTSTS or INTIDX register, all interrupts are initialized.
1.9.2 REGISTERS 
The registers of the modem block either control or report the state of the modem. The registers,
which influence transmission performance of the modem block, should be set with the values
provided by CEL, and should not be modified by a user’s application program.
Table 38 lists the registers in the PHY Layer of the ZIC2410. The address of each register is
assigned to a data memory area in the microcontroller, so a user application program can read
and write the register as a general memory.
Address (Hex)
Rev A
2200
2201
2202
2203
2204
2205
RX End Interrupt (RXEND_INT)
RX Start Interrupt (RXSTART_INT)
TX End Interrupt (TXEND_INT)
Modem Ready Interrupt (MDREADY_INT)
RXRFPD
RXRFPU
PCMD0
PCMD1
PLLPD
PLLPU
Name
Table 38 – PHY Register Address Map
PHY Command0
PHY Command1
PLL Power-Down
PLL Power-Up
RF RX Path Power-Down
RF RX Path Power-Up
Document No. 0005-05-07-00-000
ZIC2410 Datasheet
Description
11111111
00000000
11111111
Initial Value
11111100
11000111
11100000
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