hi-8683 Holt Integrated Circuits, Inc., hi-8683 Datasheet

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hi-8683

Manufacturer Part Number
hi-8683
Description
Arinc 429 & 561 Serial Data To 8-bit Parallel Data
Manufacturer
Holt Integrated Circuits, Inc.
Datasheet
FEATURES
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DESCRIPTION
The HI-8683 and HI-8684 are system components for
interfacing incoming ARINC 429 signals to 8-bit parallel
data using proven +5V analog/digital CMOS technology.
The HI-8683 is a digital device that requires an external
analog line receiver such as the HI-8482 or HI-8588
between the ARINC bus and the device inputs. The HI-8684
incorporates the digital logic and analog line receiver
circuitry in a single device.
The HI-8683 is also available as a second source to the
DLS-112
package pinouts.
The receivers on the HI-8684 connect directly to the ARINC
429 Bus and translate the incoming signals to normal CMOS
levels. Internal comparator levels are set just below the
standard 6.5 volt minimum data threshold and just above the
standard 2.5 volt maximum null threshold. The -10 version
of the HI-8684 allows the incorporation of an external 10K
resistance in series with each ARINC input for lightning
protection without affecting ARINC level detection.
Both products offer high speed 8-bit parallel bus interface, a
32-bit buffer, and error detection for word length and parity.
A reset pin is also provided for power-on initialization.
(DS8683 Rev. I)
March 2007
561 data to 8-bit parallel data
Test inputs bypass analog inputs (HI-8684)
Automatic conversion of serial ARINC 429, 575 &
High speed parallel 8-bit data bus
Error detection -
Reset input for power-on initialization
On-chip line receiver option (HI-8684)
Input hysteresis of at least 2 volts (HI-8684)
Simplified lightning protection with the ability to add
Plastic package options - surface mount (SOIC),
10 Kohm external series resistors (HI-8684-10)
PLCC and DIP
Military processing available
with the original
word length
18 pin DIP and 28 pin PLCC
ARINC 429 & 561 Serial Data to 8-Bit Parallel Data
and
parity
HOLT INTEGRATED CIRCUITS
www.holtic.com
W
HI-8683, HI-8684
APPLICATIONS
PIN CONFIGURATIONS
DATARDY
DATARDY
ARINC INTERFACE DEVICE
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(See page 8 for additional pin configurations)
Avionics data communication
Serial to parallel conversion
Parallel to serial conversion
18-Pin Plastic SOIC - WB Package
20-Pin Plastic SOIC - WB Package
Vcc
D7
D6
D5
D4
D3
D2
D1
D0
D7
D6
D5
D4
D3
D2
D1
D0
10
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
1
2
3
4
5
6
7
8
9
HI-8684PST-10
HI-8684PSI-10
HI-8683PST
HI-8684PST
HI-8683PSI
HI-8684PSI
HI-8683
HI-8684
&
18
17
16
15
14
13
12
10
11
20
19
18
17
16
15
14
13
12
11
(Top View)
Vcc
GAPCLK
RESET
INB
INA
ERROR
PARITY ENB
READ
GND
GAPCLK
TESTA
TESTB
RESET
RINB (-10)
RINA (-10)
ERROR
PARITY ENB
READ
GND
03/07

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hi-8683 Summary of contents

Page 1

... HI-8482 or HI-8588 between the ARINC bus and the device inputs. The HI-8684 incorporates the digital logic and analog line receiver circuitry in a single device. The HI-8683 is also available as a second source to the DLS-112 with the original 18 pin DIP and 28 pin PLCC package pinouts ...

Page 2

... RECEIVER INPUTS Figure block diagram of both the HI-8683 and HI-8684. The difference between the two products is the HI-8684 has a built-in line receiver whereas the HI-8683 is strictly a digital ...

Page 3

... RESET READ FUNCTIONAL DESCRIPTION (cont.) PROTOCOL DETECTION ARINC clock and data in the HI-8683 are derived from the two streams of digital data at the INA and INB inputs and the resulting One/Zero data is shifted into a 32-bit input register as illustrated in Figure 3. In the HI-8684, the One/Zero data shifted into the input reg- ...

Page 4

... ARINC word since the internal byte counter is always reset to the first byte when new data is trans- ferred to the receive buffer. RINA -1.50 to +1.50V -3.25V to -6.50V +3.25V to +6.50V don't care HI-8683, HI-8684 Read Byte 1st Byte 1 2nd Byte 2 3rd Byte 3 4th Byte 4 FIGURE 2 ...

Page 5

... TIMING DIAGRAMS INA (HI-8683 only) INB (HI-8683 only) VDIFF RINA - RINB (HI-8684 only) DERIVED DATA DERIVED CLOCK FIGURE 3 - RECEIVER INPUT TIMING FOR ARINC 429 TESTA TESTB DERIVED DATA DERIVED CLOCK FIGURE 4 - TEST INPUT TIMING FOR ARINC 429 32nd DERIVED DATA ARINC Bit ...

Page 6

... INB, RESET , GAPCLK, Input voltage high low Input current source sink Input capacitance HI-8683, HI-8684 RECOMMENDED OPERATING CONDITIONS Supply Voltages V ...................................................+5V CC Temperature Range Industrial Screening .............. -40°C to +85°C Hi-Temp Screening .............. -55°C to +125°C Military Screening..................-55°C to +125°C Junction Temperature, Tj ................... ...

Page 7

... Vcc = 5V, GND = 0V Operating Temperature Range (unless otherwise specified). PARAMETERS READ pulse width Data delay from READ READ to data floating READ to DATA RDY clear READ pulse to next READ pulse GAPCLK frequency 32 ARINC bit to DATA RDY HI-8683, HI-8684 SYMBOL TEST CONDITIONS 5. 0. ...

Page 8

... HI-8683 & HI-8684 PIN CONFIGURATIONS (See page 1 for additional pin configurations N RESET HI-8683PJI INB HI-8683PJT INA 14 - ERROR HI-8683 20-Pin Plastic PLCC ORDERING INFORMATION HI - 868xxx HI-8683, HI-8684 DATA VCC 1 18 RDY D6 GAPCLK RESET 3 16 ...

Page 9

... BSC (1.27) BSC = “Basic Spacing between Centers” is theoretical true position dimension and has no tolerance. (JEDEC Standard 95) HI-8683, HI-8684 PACKAGE DIMENSIONS .905 ±.015 .905 ± .015 (22.99 ±.381) (22.99 ± .381) .135 ±.015 .135 ± .015 (3.429 ±.381) (3.429 ± ...

Page 10

... BSC = “Basic Spacing between Centers” is theoretical true position dimension and has no tolerance. (JEDEC Standard 95) HI-8683, HI-8684 PACKAGE DIMENSIONS .5035 ± .0075 (12.789 ± .191) .295 ± .002 (7.493 ± .051) .018 typ (.457) 0° ...

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