am41dl6408h Meet Spansion Inc., am41dl6408h Datasheet - Page 13

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am41dl6408h

Manufacturer Part Number
am41dl6408h
Description
Stacked Multi-chip Package Mcp Flash Memory And Sram 64 Megabit 8 M X 8-bit/4 M X 16-bit Cmos 3.0 Volt-only, Simultaneous Operation Flash Memory And 8 Mbit 1 M X 8-bit/512 K X 16-bit Static Ram
Manufacturer
Meet Spansion Inc.
Datasheet
Legend: L = Logic Low = V
Input, Byte Mode, SADD = Flash Sector Address, A
Notes:
1. Other operations except for those indicated in this column are inhibited.
2. Do not apply CE#f = V
3. Don’t care or open LB#s or UB#s.
4. If WP#/ACC = V
5. The sector protect and sector unprotect functions may also be implemented via programming equipment. See the “Sector/Sector
6. If WP#/ACC = V
November 24, 2003
Operation
(Notes 1, 2)
Read from Flash
Write to Flash
Standby
Output Disable
Flash Hardware
Reset
Sector Protect
(Note 5)
Sector Unprotect
(Note 5)
Temporary Sector
Unprotect
Read from SRAM
Write to SRAM
If WP#/ACC = V
Block Protection and Unprotection” section.
depends on whether they were last protected or unprotected using the method described in “Sector/Sector Block Protection and
Unprotection”. If WP#/ACC = V
Table 2. Device Bus Operations—Flash Word Mode, CIOf = V
IL
ACC
IL
, the two outermost boot sectors remain protected. If WP#/ACC = V
V
, the boot sectors will be protected. If WP#/ACC = V
CE#f CE1#s CE2s OE# WE# SA
0.3 V
CC
H
H
L
L
L
X
L
L
X
(9V), the program time will be reduced by 40%.
±
IL
, CE1#s = V
IL
, H = Logic High = V
H
X
H
X
H
X
H
X
H
X
H
X
H
X
L
L
L
HH,
A D V A N C E
all sectors will be unprotected.
IL
H
H
H
X
L
X
L
X
L
X
L
X
L
X
L
X
L
and CE2s = V
H
X
H
X
H
H
X
X
L
L
IH
, V
H
X
H
X
X
H
L
L
L
L
IN
IH
ID
= Address In, D
Am41DL6408H
at the same time.
= 11.5–12.5 V, V
SA
SA
SA
X
X
X
X
X
X
X
I N F O R M A T I O N
A1 = H,
A6 = H,
A1 = H,
A6 = L,
SADD,
SADD,
A0 = L
A0 = L
Addr.
A
A
A
A
A
X
X
X
IN
IN
IN
IN
IN
IN
(Note 3)
IH
LB#s
= Data In, D
DNU
HH
the boot sectors protection will be removed.
X
X
X
X
X
X
X
X
X
= 9.0 ± 0.5 V, X = Don’t Care, SA = SRAM Address
(Note 3)
UB#s
IH
DNU
; SRAM Byte Mode, CIOs = V
X
X
X
X
X
X
X
X
X
OUT
IH
, the two outermost boot sector protection
= Data Out, DNU = Do Not Use
RESET#
V
0.3 V
V
V
V
CC
H
H
H
H
H
L
ID
ID
ID
±
WP#/ACC
(Note 4)
(Note 3)
(Note 6)
(Note 6)
L/H
L/H
L/H
L/H
H
X
X
High-Z High-Z
High-Z High-Z
High-Z High-Z
DQ7–
D
D
DQ0
D
D
D
D
D
OUT
OUT
IN
IN
IN
IN
IN
SS
DQ15–
High-Z
High-Z
High-Z
D
DQ8
D
OUT
X
X
IN
11

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