k4t1g084qm-zcd5 Samsung Semiconductor, Inc., k4t1g084qm-zcd5 Datasheet - Page 13

no-image

k4t1g084qm-zcd5

Manufacturer Part Number
k4t1g084qm-zcd5
Description
1gb M-die Ddr2 Sdram Ddr2 Sdram
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1Gb M-die DDR2 SDRAM
Differential input AC logic Level
Notes:
1. V
LDQS or UDQS) and V
(AC) - V
2. The typical value of V
in VDDQ . V
Differential AC output parameters
Note :
1. The typical value of V
in VDDQ . V
V
Symbol
Symbol
V
V
ID
OX
ID(AC)
IX(AC)
(AC) specifies the input differential voltage |V
(AC)
IL
(AC).
IX
OX
(AC) indicates the voltage at which differential input signals must cross.
AC differential cross point voltage
(AC) indicates the voltage at which differential output signals must cross.
AC differential cross point voltage
AC differential input voltage
CP
OX
IX
V
(AC) is expected to be about 0.5 * VDDQ of the transmitting device and V
V
is the complementary input signal (such as CK, DQS, LDQS or UDQS). The minimum value is equal to V
(AC) is expected to be about 0.5 * VDDQ of the transmitting device and V
CP
TR
Parameter
Parameter
< Differential signal levels >
TR
-V
CP
0.5 * VDDQ - 0.175
0.5 * VDDQ - 0.125
| required for switching, where V
Page 13 of 29
V
V
DDQ
SSQ
V
Min.
Min.
ID
0.5
0.5 * VDDQ + 0.175
0.5 * VDDQ + 0.125
V
DDQ
V
Max.
Max.
IX or
+ 0.6
TR
Crossing point
is the true input signal (such as CK, DQS,
V
OX
OX
IX
(AC) is expected to track variations
(AC) is expected to track variations
Units
Units
V
V
V
Rev.1.1 Jan. 2005
DDR2 SDRAM
Notes
Note
1
2
1
IH

Related parts for k4t1g084qm-zcd5