k4t51043qc-zle7 Samsung Semiconductor, Inc., k4t51043qc-zle7 Datasheet - Page 21
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k4t51043qc-zle7
Manufacturer Part Number
k4t51043qc-zle7
Description
512mb C-die Ddr2 Sdram
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.K4T51043QC-ZLE7.pdf
(29 pages)
Exit self refresh to a read command
Exit precharge power down to any non-read
command
Exit active power down to read command
Exit active power down to read command
(slow exit, lower power)
CKE minimum pulse width
(high and low pulse width)
ODT turn-on delay
ODT turn-on
ODT turn-on(Power-Down mode)
ODT turn-off delay
ODT turn-off
ODT turn-off (Power-Down mode)
ODT to power down entry latency
ODT power down exit latency
OCD drive mode output delay
Minimum time clocks remains ON after CKE
asynchronously drops LOW
512Mb C-die DDR2 SDRAM
Parameter
Symbol
tXSRD
tXP
tXARD
tXARDS
t
t
t
t
t
t
t
tANPD
tAXPD
tOIT
tDelay
CKE
AOND
AON
AONPD
AOFD
AOF
AOFPD
tAC(min)+
tAC(min)+
tAC(min)
tAC(min)
tIS+tCK
8 - AL
min
+tIH
200
2.5
3
2
2
2
3
8
0
DDR2-800
2
2
2tCK+tAC
tAC(max)
tAC(max)
tAC(max)
(max)+1
2.5tCK+
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max
+ 0.6
+0.7
2.5
+1
12
2
x
x
tAC(min)+
tAC(min)+
tAC(min)
tAC(min)
tIS+tCK
7 - AL
min
+tIH
200
2.5
3
2
2
2
3
8
0
DDR2-667
2
2
2tCK+tAC
tAC(max)
tAC(max)
tAC(max)
(max)+1
2.5tCK+
max
+ 0.6
+0.7
2.5
+1
12
2
x
x
tAC(min)+
tAC(min)+
tAC(min)
tAC(min)
tIS+tCK
6 - AL
min
200
+tIH
2.5
2
3
2
2
2
3
8
0
DDR2-533
2
tAC(max)
tAC(max)+
tAC(max)
2tCK+tA
C(max)+
2.5tCK+
max
2.5
+1
0.6
+1
12
2
1
x
x
tAC(min)+
tAC(min)+
tAC(min)
tAC(min)
tIS+tCK
6 - AL
min
+tIH
200
2.5
2
3
2
2
2
3
8
0
DDR2-400
2
DDR2 SDRAM
Rev. 1.4 Aug. 2005
2tCK+tAC
tAC(max)
tAC(max)
tAC(max)+
(max)+1
2.5tCK+
max
2.5
+1
0.6
+1
12
2
x
x
tCK
Units Notes
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
ns
ns
ns
ns
ns
ns
13, 25
9, 10
36
26
24
9