k4s511632b-ul75 Samsung Semiconductor, Inc., k4s511632b-ul75 Datasheet
k4s511632b-ul75
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k4s511632b-ul75 Summary of contents
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... SDRAM 512Mb B-die (x4, x8, x16) 512Mb B-die SDRAM Specification 54 TSOP-II with Pb-Free * Samsung Electronics reserves the right to change products or specification without notice. (RoHS compliant) Revision 1.1 August 2004 CMOS SDRAM Revision. 1.1 August 2004 ...
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... SDRAM 512Mb B-die (x4, x8, x16) Revision History Revision 1.0 (January, 2004) - First release. Revision 1.1 (August, 2004) - Corrected typo. CMOS SDRAM Revision. 1.1 August 2004 ...
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... RoHS compliant GENERAL DESCRIPTION The K4S510432B / K4S510832B / K4S511632B is 536,870,912 bits synchronous high data rate Dynamic RAM organized 33,554,432 words by 4 bits / 4 x 16,777,216 words by 8 bits / 4 x 8,388,608 words by 16 bits, fabricated with SAMSUNG's high perfor- mance CMOS technology. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle ...
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... SDRAM 512Mb B-die (x4, x8, x16) Package Physical Dimension #54 #1 0.10 MAX 0.004 0. 0.028 #28 #27 22.62 MAX 0.891 22.22 r0.10 0.21 0.875 0.008 r0.004 +0.10 0.30 0.80 -0.05 0.004 0.0315 0.012 -0.002 54Pin TSOP(II) Package Dimension CMOS SDRAM 0~8qC 0.25 TYP 0.010 +0.075 0.125 -0.035 +0.003 0.005 -0.001 1.00 1.20 r0.05 r0.10 MAX 0.039 r0.002 0.047 r0 ...
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... SDRAM 512Mb B-die (x4, x8, x16) FUNCTIONAL BLOCK DIAGRAM Bank Select CLK ADD LCKE LRAS LCBR CLK CKE * Samsung Electronics reserves the right to change products or specification without notice. Data Input Register 32Mx4 / 16Mx8 / 8Mx16 32Mx4 / 16Mx8 / 8Mx16 32Mx4 / 16Mx8 / 8Mx16 32Mx4 / 16Mx8 / 8Mx16 Column Decoder Latency & ...
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... SDRAM 512Mb B-die (x4, x8, x16) PIN CONFIGURATION (Top view) x8 x16 DQ0 DQ0 V V DDQ DDQ DQ1 N.C DQ2 DQ1 V V SSQ SSQ DQ3 N.C DQ4 DQ2 V V DDQ DDQ DQ5 N.C DQ6 DQ3 V V SSQ SSQ DQ7 N LDQM N CAS ...
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... SDRAM 512Mb B-die (x4, x8, x16) ABSOLUTE MAXIMUM RATINGS Parameter Voltage on any pin relative to Vss Voltage on V supply relative to Vss DD Storage temperature Power dissipation Short circuit current Note : Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be restricted to recommended operating condition. ...
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... SDRAM 512Mb B-die (x4, x8, x16) DC CHARACTERISTICS (x4) (Recommended operating condition unless otherwise noted, T Parameter Symbol Operating current I CC1 (One bank active Precharge standby current in CC2 power-down mode I PS CKE & CLK dV CC2 I N CC2 Precharge standby current in non power-down mode I NS ...
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... SDRAM 512Mb B-die (x4, x8, x16) DC CHARACTERISTICS (x8) (Recommended operating condition unless otherwise noted, T Parameter Symbol Operating current I CC1 (One bank active Precharge standby current in CC2 power-down mode I PS CKE & CLK dV CC2 I N CC2 Precharge standby current in non power-down mode I NS ...
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... Operating current I CC4 (Burst mode) Refresh current I CC5 Self refresh current I CC6 Notes : 1. Measured with outputs open. 2. Refresh period is 64ms. 3. K4S511632B-UC75 4. K4S511632B-UL75 5. Unless otherwise noted, input swing IeveI is CMOS 70qC) A Test Condition Burst length = 1 t (min) t CKE dV ...
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... SDRAM 512Mb B-die (x4, x8, x16) AC OPERATING TEST CONDITIONS Parameter AC input levels (Vih/Vil) Input timing measurement reference level Input rise and fall time Output timing measurement reference level Output load condition 3.3V 1200: Output 50pF 870: (Fig output load circuit OPERATING AC PARAMETER ...
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... SDRAM 512Mb B-die (x4, x8, x16) AC CHARACTERISTICS (AC operating conditions unless otherwise noted) Parameter CAS latency=3 CLK cycle time CAS latency=2 CAS latency=3 CLK to valid output delay CAS latency=2 CAS latency=3 Output data hold time CAS latency=2 CLK high pulse width CLK low pulse width ...
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... SDRAM 512Mb B-die (x4, x8, x16) IBIS SPECIFICATION I Characteristics (Pull-up) OH 100MHz 100MHz Voltage 133MHz 133Mhz Min Max (V) I (mA) I (mA) 3.45 -2.4 3.3 -27.3 3.0 0.0 -74.1 2.6 -21.1 -129.2 2.4 -34.1 -153.3 2.0 -58.7 -197.0 1.8 -67.3 -226.2 1.65 -73.0 -248.0 1.5 -77.9 -269.7 1.4 -80.8 -284.3 1.0 -88.6 -344.5 0.0 -93.0 -502.4 I Characteristics (Pull-down) OL 100MHz 100MHz Voltage 133MHz 133MHz Min Max (V) I (mA) I (mA) 0.0 0.0 0.0 0.4 27.5 70.2 0.65 41.8 107.5 0.85 51.6 133.8 1.0 58.0 151.2 1 ...
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... SDRAM 512Mb B-die (x4, x8, x16) V Clamp @ CLK, CKE, CS, DQM & (V) I (mA) DD 0.0 0.0 0.2 0.0 0.4 0.0 0.6 0.0 0.7 0.0 0.8 0.0 0.9 0.0 1.0 0.23 1.2 1.34 1.4 3.02 1.6 5.06 1.8 7.35 2.0 9.83 2.2 12.48 2.4 15.30 2.6 18.31 V Clamp @ CLK, CKE, CS, DQM & (V) I (mA) SS -2.6 -57.23 -2.4 -45.77 -2.2 -38.26 -2.0 -31.22 -1.8 -24.58 -1.6 -18.37 -1.4 -12.56 -1.2 -7.57 -1.0 -3.37 -0.9 -1.75 -0.8 -0.58 -0.7 -0.05 -0.6 0.0 -0.4 0.0 -0.2 0.0 0.0 0.0 CMOS SDRAM Minimum V clamp current DD (Referenced Voltage I (mA) Minimum V clamp current -10 ...
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... MRS can be issued only at all banks precharge state. A new command can be issued after 2 CLK cycles of MRS. 3. Auto refresh functions are as same as CBR refresh of DRAM. The automatical precharge without row precharge command is meant by "Auto". Auto/self refresh can be issued only at all banks precharge state. ...