k4s51163lf Samsung Semiconductor, Inc., k4s51163lf Datasheet
k4s51163lf
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k4s51163lf Summary of contents
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... Address configuration Organization 32M x16 GENERAL DESCRIPTION The K4S51163LF is 536,870,912 bits synchronous high data rate Dynamic RAM organized 8,388,608 words by 16 bits, fabricated with SAMSUNG's high performance CMOS technol- ogy. Synchronous design allows precise cycle control with the use of system clock and I/O transactions are possible on every clock cycle ...
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... K4S51163LF-Y(P)C/L/F FUNCTIONAL BLOCK DIAGRAM Bank Select CLK ADD LCKE LRAS LCBR LWE CLK CKE CS Data Input Register Column Decoder Latency & Burst Length Programming Register LCAS LWCBR Timing Register RAS CAS WE L(U)DQM 2 Mobile-SDRAM LWE LDQM ...
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... K4S51163LF-Y(P)C/L/F Package Dimension and Pin Configuration *1 < Bottom View E/2 *2: Top View Substrate(2Layer) *1: Bottom View *2 < Top View > #A1 Ball Origin Indicator > VSS B DQ14 C DQ12 D DQ10 E DQ8 F UDQM G A12 H A8 ...
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... K4S51163LF-Y(P)C/L/F ABSOLUTE MAXIMUM RATINGS Parameter Voltage on any pin relative Voltage on V supply relative Storage temperature Power dissipation Short circuit current NOTES: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. Functional operation should be restricted to recommended operating condition. ...
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... Self Refresh Current NOTES: 1. Measured with outputs open. 2. Refresh period is 64ms. 3. Internal TCSR can be supported(In commercial Temp : Max 40°C/Max 70°C). 4. K4S51163LF-Y(P)C** 5. K4S51163LF-Y(P)L** 6. K4S51163LF-Y(P)F** 7. Unless otherwise noted, input swing IeveI is CMOS(VIH /VIL=VDDQ/VSSQ -25 to 70° Test Condition Burst length = 1 ≥ ...
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... K4S51163LF-Y(P)C/L/F AC OPERATING TEST CONDITIONS Parameter AC input levels (Vih/Vil) Input timing measurement reference level Input rise and fall time Output timing measurement reference level Output load condition VDDQ 500Ω VOH (DC Output VOL (DC) = 0.2V, IOL = 0.1mA 30pF 500Ω Figure 1. DC Output Load Circuit = 2.5V ± ...
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... K4S51163LF-Y(P)C/L/F OPERATING AC PARAMETER (AC operating conditions unless otherwise noted) Parameter Row active to row active delay RAS to CAS delay Row precharge time Row active time Row cycle time Last data in to row precharge Last data in to Active delay Last data in to new col. address delay Last data in to burst stop Col ...
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... K4S51163LF-Y(P)C/L/F AC CHARACTERISTICS (AC operating conditions unless otherwise noted) Parameter CLK cycle time CAS latency=3 CLK cycle time CAS latency=2 CLK cycle time CAS latency=1 CLK to valid output delay CAS latency=3 CLK to valid output delay CAS latency=2 CLK to valid output delay CAS latency=1 ...
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... K4S51163LF-Y(P)C/L/F SIMPLIFIED TRUTH TABLE COMMAND Register Mode Register Set Auto Refresh Entry Refresh Self Refresh Exit Bank Active & Row Addr. Read & Auto Precharge Disable Column Address Auto Precharge Enable Write & Auto Precharge Disable Column Address Auto Precharge Enable ...
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... K4S51163LF-Y(P)C/L/F A. MODE REGISTER FIELD TABLE TO PROGRAM MODES Register Programmed with Normal MRS BA0 ~ BA1 Address A12 ~ A10/AP "0" Setting for Function RFU Normal MRS Normal MRS Mode Test Mode CAS Latency A8 A7 Type Mode Register Set Reserved ...
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... K4S51163LF-Y(P)C/L/F Partial Array Self Refresh 1. In order to save power consumption, Mobile SDRAM has PASR option. 2. Mobile SDRAM supports 3 kinds of PASR in self refresh mode : Full Array, 1/2 of Full Array and 1/4 of Full Array. BA1=0 BA1=0 BA0=0 BA0=1 BA1=1 BA1=1 BA0=0 BA0=1 - Full Array Temperature Compensated Self Refresh 1. In order to save power consumption, Mobile-DRAM includes the internal temperature sensor and control units to control the self refresh cycle automatically according to the two temperature range : Max 40 ° ...
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... K4S51163LF-Y(P)C/L/F C. BURST SEQUENCE 1. BURST LENGTH = 4 Initial Address BURST LENGTH = 8 Initial Address ...