ic42s16400a ETC-unknow, ic42s16400a Datasheet - Page 34
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ic42s16400a
Manufacturer Part Number
ic42s16400a
Description
1m X 16bit X 4 Banks 64-mbit Sdram
Manufacturer
ETC-unknow
Datasheet
1.IC42S16400A.pdf
(67 pages)
- Current page: 34 of 67
- Download datasheet (2Mb)
IC42S16400A
Clock Suspension During Burst Read (Using CKE) (1 of 2)
BS1=”L”, Bank C,D = Idle
34
*BS0
DQM
ADD
CKE
RAS
CAS
CLK
A10
WE
DQ
CS
Hi-Z
Command
Activate
Bank A
T0 T1 T2 T3 T4 T5 T6 T7
RAa
RAa
t
CK2
Read
Command
Bank A
CAa
QAa0
Suspended
QAa1
Clock
1 Cycle
Suspended
T8 T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22
2 Cycles
Clock
QAa2
Suspended
3 Cycles
Clock
QAa3
t
HZ
Burst Length=4, CAS Latency=2
Integrated Circuit Solution Inc.
DR039-0A 02/19/2004
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