hys64t512022edl-25f-a Qimonda, hys64t512022edl-25f-a Datasheet - Page 14
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hys64t512022edl-25f-a
Manufacturer Part Number
hys64t512022edl-25f-a
Description
200-pin Dual-die Small-outline Ddr2 Sdramm Modules
Manufacturer
Qimonda
Datasheet
1.HYS64T512022EDL-25F-A.pdf
(33 pages)
3.3
1) Timings are guaranteed with CK/CK differential Slew Rate of 2.0 V/ns. For DQS signals timings are guaranteed with a differential Slew
2) The CK/CK input reference level (for timing reference to CK/CK) is the point at which CK and CK cross. The DQS / DQS, RDQS / RDQS,
3) Inputs are not recognized as valid until
4) The output timing reference voltage level is
5)
Rev. 1.00, 2008-07
07032008-OVFG-HMBJ
Speed Grade
QAG Sort Name
CAS-RCD-RP latencies
Parameter
Clock Period
Row Active Time
Row Cycle Time
RAS-CAS-Delay
Row Precharge Time
Speed Grade
QAG Sort Name
CAS-RCD-RP latencies
Parameter
Clock Period
Row Active Time
Row Cycle Time
RAS-CAS-Delay
Row Precharge Time
Rate of 2.0 V/ns in differential strobe mode and a Slew Rate of 1 V/ns in single ended mode.
input reference level is the crosspoint when in differential strobe mode.
t
RAS.MAX
is calculated from the maximum amount of time a DDR2 device can operate without a refresh command which is equal to 9 x
@ CL = 3
@ CL = 4
@ CL = 5
@ CL = 6
Speed Grade Definitions
@ CL = 3
@ CL = 4
@ CL = 5
Symbol
t
t
t
t
t
t
t
t
CK
CK
CK
CK
RAS
RC
RCD
RP
V
REF
V
stabilizes. During the period before
TT
Symbol
t
t
t
t
t
t
t
CK
CK
CK
RAS
RC
RCD
RP
.
DDR2–800D
–25F
5–5–5
Min.
5
3.75
2.5
2.5
45
57.5
12.5
12.5
14
–3S
5–5–5
Min.
5
3.75
3
45
60
15
15
DDR2–667D
Max.
8
8
8
8
70k
—
—
—
V
DDR2–800E
–2.5
6–6–6
Min.
5
3.75
3
2.5
45
60
15
15
REF
Max.
8
8
8
70k
—
—
—
stabilizes, CKE = 0.2 x
Small Outline DDR2 SDRAM Modules
HYS64T512022EDL–[2.5/25F/3S]–A
Max.
8
8
8
8
70k
—
—
—
Unit
t
—
ns
ns
ns
ns
ns
ns
ns
CK
Speed Grade Definition
Speed Grade Definition
t
—
ns
ns
ns
ns
ns
ns
ns
ns
Unit
V
CK
DDQ
Internet Data Sheet
TABLE 12
TABLE 13
Note
1)2)3)4)
1)2)3)4)
1)2)3)4)
1)2)3)4)5)
1)2)3)4)
1)2)3)4)
1)2)3)4)
Note
1)2)3)4)
1)2)3)4)
1)2)3)4)
1)2)3)4)
1)2)3)4)5)
1)2)3)4)
1)2)3)4)
1)2)3)4)
t
REFI
.