w83c43 Winbond Electronics Corp America, w83c43 Datasheet
w83c43
Available stocks
Related parts for w83c43
w83c43 Summary of contents
Page 1
... GENERAL DESCRIPTION The W83C43 is a keyboard controller designed to provide the functions needed to interface a CPU to a keyboard PS/2 mouse. The W83C43 can be used with IBM or PS/2-based systems. The controller receives serial data from the keyboard or PS/2 mouse, checks the parity of the data, and presents the data to the system as a byte of data in its output buffer. The controller will interrupt the system when data are placed in its output buffer ...
Page 2
... W83C43 Vcc T1 P27 (KDAT) P26 (KCLK) P25 (IEMP/MINT) P24 (KINT) P17 (KINH) P16 (DISP) P15 (JUMP) P14 (RAM) P13 P12 P11 P10 NC Vcc P23 (NC/MCLK) P22 (NC/MDAT) P21 (GA20) P20 (RC) ...
Page 3
... Bit 1 of Port2 ( GA20 : GATE A20) P22 Bit 2 of Port2 (NC: User-defined I/O) P23 Bit 3 of Port2 (NC: User-defined I/ Optional +5V Power CC Supply - 3 - W83C43 FUNCTION PS/2 MODE K/B Clock Input Crystal Clock I/P Crystal Clock I/P Chip Reset Optional + 5V Power Supply Chip Select Optional Ground Power I/O Read Connect to Address A2 I/O Write ...
Page 4
... P26 Bit 6 of Port2 (KCLK: K/B Clock Output) P27 Bit 7 of Port2 (KDAT: K/B Data Output) T1 K/B Data Input Vcc +5V Power Supply - 4 - W83C43 FUNCTION PS/2 MODE Bit 0 of Port1 (K/B Data Input) Bit 1 of Port1 (Mouse Data Input) Bit 2 of Port2 (User-defined I/O) Bit 3 of Port1 (User-defined I/O) ...
Page 5
... HARDWIRE CONTROL & SELECT LOGIC R64 STATUS BUFFER REGISTER W60 INPUT W64 BUFFER REGISTER OUTPUT R60 BUFFER REGISTER - 5 - W83C43 TRANSMIT CONTRROL TRANSMIT REGISTER STATUS REGISTER P10 INPUT & P11 P12 OUTPUT P13 P14 (RAM) PORT P15 (JUMP) INTERFACE P16 (DISP) P17 (KINH) ...
Page 6
... Input Buffer Full MIN. TYP. MAX. 4.75 5.0 5.25 0.8 0.6 2.0 3.0 3.5 2.4 2.4 0.4 0.4 10K -10 10 -10 10 -10 10 -10 550 15 50 DESCRIPTION 0: Output buffer empty 1: Output buffer full 0: Input buffer empty 1: Input buffer full - 6 - W83C43 UNIT NOTE 5.5V ...
Page 7
... It is set to 0 after a power-on reset 0: Data byte 1: Command byte 0: Keyboard is inhibited 1: Keyboard is not inhibited 0: No transmit time-out error 1: Transmit time-out error 0: No receive time-out error 1: Receive time-out error 0: Odd parity (no error) 1: Even parity (error) FUNCTION Publication Release Date: January 1996 - 7 - W83C43 Revision A2 ...
Page 8
... System Flag FUNCTION FUNCTION FUNCTION DESCRIPTION 0: Output buffer empty 1: Output buffer full 0: Input buffer empty 1: Input buffer full This bit may be set writting to the system flag bit in the command byte of the keyboard controller set to 0 after a power-on reset W83C43 ...
Page 9
... Mouse Clock Output DESCRIPTION 0: Data byte 1: Command byte 0: Keyboard is inhibited 1: Keyboard is not inhibited 0: Auxiliary device output buffer empty 1: Auxiliary device output buffer full 0: No time-out error 1: Time-out error 0: Odd parity 1: Even parity (error) FUNCTION FUNCTION Publication Release Date: January 1996 - 9 - W83C43 Revision A2 ...
Page 10
... IBM PC Compatible Mode IBM PC Mode 5 Disable Keyboard 4 Inhibit Override 3 System Flag 2 Reserved 1 Enable Output Buffer Full Interrupt 0 BIT BIT DEFINITION 00 No Error Detected 01 K/B Clock Line is Stuck Low 02 K/B Clock Line is Stuck High 03 K/B Data Line is Stuck Low K/B Data Line is Stuck High W83C43 ...
Page 11
... Enable Auxiliary Interrupt 0 Enable Keyboard Interrupt BIT BIT DEFINITION 00 No Error Detected 01 Auxiliary Device "Clock" line is stuck low 02 Auxiliary Device "Clock" line is stuck high 03 Auxiliary Device "Data" line is stuck low 04 Auxiliary Device "Data" line is stuck low - 11 - W83C43 Publication Release Date: January 1996 Revision A2 ...
Page 12
... Gate Delay Time from WRB FUNCTION BIT BIT DEFINITION No Error Detected 00 01 Keyboard "Clock" line is stuck low 02 Keyboard "Clock" line is stuck high Keyboard "Data" line is stuck low 03 04 Keyboard "Data" line is stuck high DESCRIPTION - 12 - W83C43 MIN. MAX. UNIT ...
Page 13
... Mode detect signal after P10 goes high T31 High pulse of mode detect signal T32 Low pulse of mode detect signal T33 Mode detect signal after RESET goes high T34 Time out of AT mode‘ s mode detect signal DESCRIPTION - 13 - W83C43 MIN. MAX. UNIT ...
Page 14
... FAST RESET PULSE RC FE COMMAND Read Cycle Timing A2,CSB AEN RDB D0-D7 Send Data to K/B CLOCK (KCLK) T12 SERIAL DATA START (KDAT ACTIVE T7 DATA ACTIVE T10 T11 DATA OUT T14 T13 T19 - 14 - W83C43 T17 T18 T16 D7 P STOP ...
Page 15
... Receive Data from Mouse MCLK T29 MDAT START T14 T13 T23 T22 T24 T26 T27 T28 W83C43 STOP STOP Bit D7 P STOP Bit Publication Release Date: January 1996 Revision A2 ...
Page 16
... RESET goes high) RESET P27 P10 AT Mode's Mode Detect (P10 internal pull high. As there is no external loop between P27 and P10 so P27 issues pulse until time out ) RESET P27 P10 T31 T33 T32 T31 T30 T32 T34 T31 T33 - 16 - W83C43 T32 ...
Page 17
... RD 21 P20 WR RCB 22 P21 GATE20 23 D0 P22 24 D1 P23 35 P24/OB KEYBOARD INTERRUPT D2 36 P25 P26/KCLK 38 D5 P27/KDAT GND NC GND 7407 1 2 KB8042-DIP 74ALS04 7407 - 17 - W83C43 Vcc 1 2 KEYBOARD CLOCK 1 2 KEYBOARD DATA Publication Release Date: January 1996 Revision A2 ...
Page 18
... P21 GATE20 23 D0 P22 24 D1 P23 35 D2 P24/ P25 37 D4 P26/KCLK 38 D5 P27/KDAT 7406 GND NC GND KB8042-DIP 7406 7406 1 7406 W83C43 KEYBOARD INTERRUPT PS/2 MOUSE INTERRUPT Vcc PS/2 MOUSE DATA PS/2 MOUSE CLOCK Vcc KEYBOARD CLOCK KEYBOARD DATA ...
Page 19
... Driving from External Source OPTION 1 OPTION 2 OPTION 3 PCLK PCLK 1 PCLK 1 N.C. 470 7404 7407 1 2 7407 - 19 - W83C43 +5V 470 Publication Release Date: January 1996 Revision A2 ...
Page 20
... Seating Plane Base Plane A Seating Plane W83C43 Dimension in inch Dimension in mm Symbol Min. Nom. Max. Nom. Min. Max. A 5.33 0.210 A 0.010 0. 0.155 0.160 0.150 3.81 3.94 4. 0.016 0.018 0.41 0.46 0.56 0.022 B 0 ...
Page 21
... Note: All data and specifications are subject to change without notice. Winbond Electronics North America Corp. Winbond Memory Lab. Winbond Microelectronics Corp. Winbond Systems Lab. 2730 Orchard Parkway, San Jose, CA 95134, U.S.A. TEL: 1-408-9436666 FAX: 1-408-9436668 Publication Release Date: January 1996 - 21 - W83C43 Revision A2 ...