ace24lc02dm+ ACE Technology Co., LTD., ace24lc02dm+ Datasheet - Page 8

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ace24lc02dm+

Manufacturer Part Number
ace24lc02dm+
Description
Two-wire Serial Eeprom
Manufacturer
ACE Technology Co., LTD.
Datasheet
 
                                                                                                                                                 
                                             
Page Write:
condition after the first data word is clocked in. Instead, after the EEPROM acknowledges receipt of the
first data word, the microcontroller can transmit up to seven (2K) or fifteen more data words. The
EEPROM will respond with a zero after each data word received. The microcontroller must terminate the
page write sequence with a stop condition (refer to Figure 9).
each data word. The higher data word address bits are not incremented, retaining the memory page
row location. When the word address, internally generated, reaches the page boundary, the following
byte is placed at the beginning of the same page. If more than eight (2K) or sixteen data words are
transmitted to the EEPROM, the data word address will “roll over” and previous data will be overwritten.
Acknowledge Polling:
polling can be initiated. This involves sending a start condition followed by the device address word.
The read/write bit is representative of the operation desired. Only if the internal write cycle has
completed will the EEPROM respond with a zero allowing the read or write sequence to continue.
Read Operations:
select bit in the device address word is set to one. There are three read operations: current address
read, random address read and sequential read.
Current Address Read:
write operation, incremented by one. This address stays valid between operations as long as the chip
power is maintained. The address “roll over” during read is from the last byte of the last memory page
to the first byte of the first page. The address “roll over” during write is from the last byte of the current
page to the first byte of the same page.
the EEPROM, the current address data word is serially clocked out. The microcontroller does not
respond with an input zero but does generate a following stop condition (refer to Figure 10).
Random Read:
device address word and data word address are clocked in and acknowledged by the EEPROM, the
microcontroller must generate another start condition. The microcontroller now initiates a current
address read by sending a device address with the read/write select bit high. The EEPROM
acknowledges the device address and serially clocks out the data word. The microcontroller does not
respond with a zero but does generate a following stop condition (refer to Figure 11).
The 2K EEPROM is capable of an 8-byte page write, devices are capable of 16-byte page writes.
A page write is initiated the same as a byte write, but the microcontroller does not send a stop
The data word address lower three (2K) or four bits are internally incremented following the receipt of
Once the internally timed write cycle has started and the EEPROM inputs are disabled, acknowledge
Read operations are initiated the same way as write operations with the exception that the read/write
The internal data word address counter maintains the last address accessed during the last read or
Once the device address with the read/write select bit set to one is clocked in and acknowledged by
A random read requires a “dummy” byte write sequence to load in the data word address. Once the
Technology
Two-wire Serial EEPROM
ACE24LC02DM+
VER1.3
8

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