ppc440epx Applied Micro Circuits Corporation (AMCC), ppc440epx Datasheet - Page 62

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ppc440epx

Manufacturer Part Number
ppc440epx
Description
Powerpc 440epx Embedded Processor
Manufacturer
Applied Micro Circuits Corporation (AMCC)
Datasheet

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440EPx – PPC440EPx Embedded Processor
Table 8. Signal Functional Description (Sheet 6 of 9)
Notes:
1. Receiver input has hysteresis
2. Must pull up (recommended value is 3kΩ to OV
3. Must pull down (recommended value is 1kΩ)
4. If not used, must pull up (recommended value is 3kΩ to OV
5. If not used, must pull down (recommended value is 1kΩ)
6. Strapping input during reset; pull-up or pull-down required
62
USB UTMI Peripheral Interface
USB2DI7:0
USB2DO7:0
USB2TxRdy
USB2RxAct
USB2RxDV
USB2RxErr
USB2LS0:1
USB2TxVal
USB2Susp
USB2XcvrSel
USB2TermSel
USB2OM0:1
USB2Clk
USB PHY Peripheral Interface
USB2Xcvr
USB2Xcvr
USB2XtalIn
USB2XtalOut
USB2RExt
NAND Flash Interface
NFALE
NFCE0:3
NFCLE
NFRdyBusy
NFREn
NFWEn
Signal Name
Unidirectional data inputs.
Unidirectional data outputs.
Transmit data ready.
Receive active.
Receive valid.
Receive error.
Line state 0 and Line state 1.
Transmit valid.
Suspend.
Transceiver select.
Termination select.
Operational mode.
USB 2.0 Clock (60MHz).
Address Latch Enable.
USB 2.0 differential transceiver.
USB 2.0 external crystal (48MHz) or external oscillator (48MHz).
External crystal: In/Out differential must not be less than
500mV.
External oscillator: Connect oscillator with signal swing of 3.3V
between USB2XtalOut and ground.
See Table 19 on page 75.
External resistor connection for bias current.
Use 3.4kΩ, 1% resistor connected to GND.
Chip Enable (multiplexed with the PerCS0:3 signals).
Command Latch Enable.
Latches operational commands into the NAND Flash.
Ready/Busy.
Indicates status of device during program erase or page read.
This signal is wire-OR connected from all NAND Flash devices.
Read Enable.
Data is latched on the rising edge.
Write Enable.
Data is latched on the rising edge.
DD
(EOV
Description
DD
DD
for Ethernet)
(EOV
DD
for Ethernet)
Preliminary Data Sheet
Revision 1.29 – July 22, 2008
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
I
I
I
I
I
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
w/pull-down
5V tolerant
w/pull-up
w/pull-up
Analog
Analog
Analog
Type
AMCC Proprietary
Notes
1, 5
1
1
1
1
1
1
1
5
1
1
1
1
1
1

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