cdp1822 Intersil Corporation, cdp1822 Datasheet
cdp1822
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cdp1822 Summary of contents
Page 1
... The CDP1822 features high speed and a wide operating voltage range. Both types have separate data inputs and outputs and utilize single power supplies 6.5V for the CDP1822C and 4V to 10.5V for the CDP1822. Two Chip-Select inputs are provided to simplify system expansion ...
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... Absolute Maximum Ratings DC Supply Voltage Range (All Voltages Referenced to V Terminal) SS CDP1822 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +11V CDP1822C -0.5V to +7V Input Voltage Range, All Inputs . . . . . . . . . . . . . -0. Input Current, Any One Input Recommended Operating Conditions PARAMETER DC Operating Voltage Range Input Voltage Range Static Electrical Specifications ...
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... Output Hold from Chip-Select 2 t DOH2 Output Hold from Output Disable t DOH3 NOTES: 1. Time required by a limit device to allow for indicated function Typical values are for and nominal V A CDP1822, CDP1822C - +85 C, Except as Noted (Continued) A CONDITIONS CDP1822 V V ...
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... Address Setup t AS Write Recovery t WR Write Width t WRW Input Data Setup Time t DS Data Hold t DH Chip-Select 1 Setup t CS1S Chip-Select 2 Setup t CS2S CDP1822, CDP1822C DOA1 t DOA2 t DOA3 t AA HIGH FIGURE 1. READ CYCLE TIMING WAVEFORMS - 5%, Input 100 pF ...
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... OUTPUT DISABLE xxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx DI1-DI4 xxxxxxxxxxxxxxxxxxxx READ/WRITE xxxxxxxxxxxxxx xxxxxxxxxxxxxx xxxxxxxxxxxxxx xxxxxxxxxxxxxx NOTE required for common I/O operation only. For separate I/O operations, output disable is don’t care. ODS CDP1822, CDP1822C - 5%, Input 100 pF. (Continued) L TEST CD1822 ...
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... C and nominal V A DATA RETENTION MODE V DD 0. CDR FIGURE 3. LOW V DATA RETENTION TIME WAVEFORMS DD CDP1822, CDP1822C o = -40 to +85 C, see Figure 3. A TEST CONDITIONS CDP1822 V V (NOTE (V) (V) MIN TYP - - - 1 600 ...
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... CONTROL CSI † CS2 † † INPUT PROTECTION † † NETWORK FIGURE 5. FUNCTIONAL BLOCK DIAGRAM FOR CDP1822 AND CDP1822C CDP1822, CDP1822C ( 32) STORAGE STORAGE STORAGE ARRAY ARRAY ARRAY BIT (1) BIT (2) BIT (3) (8) (8) (8) COLUMN ...
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... DISABLE FIGURE 6. LOGIC DIAGRAM OF CONTROLS FOR CDP1822 AND CDP1822C All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use ...