hyb514400bj-50 Infineon Technologies Corporation, hyb514400bj-50 Datasheet - Page 9

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hyb514400bj-50

Manufacturer Part Number
hyb514400bj-50
Description
Manufacturer
Infineon Technologies Corporation
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HYB514400BJ-50
Manufacturer:
SIEMENS
Quantity:
2
Notes:
1. All voltages are referenced to
2.
3.
4. Address can be changed once or less while RAS =
5. An initial pause of 200 s is required after power-up followed by 8 RAS cycles of which at least
6. AC measurements assume
7.
8. Measured with a load equivalent to 2 TTL loads and 100 pF.
9. Operation within the
10.Operation within the
11.Either
12.
13.Either
14.Either
15.
16.These parameters are referenced to the CAS leading edge in early write cycles and to the WE
Semiconductor Group
I
I
or less during a fast page mode cycle (
one cycle has to be a refresh cycle, before proper device operation is achieved. In case of using
internal refresh counter, a minimum of 8 CAS-before-RAS initialization cycles instead of 8 RAS
cycles are required.
V
are also measured between
a reference point only: If
controlled by
a reference point only: If
controlled by
and are not referenced to output voltage levels.
data sheet as electrical characteristics only. If
and the I/O pin will remain open-circuit (high impedance) through the entire cycle; if
(MIN.)
I/O pins will contain data read from the selected cells. If neither of the above sets of conditions
is satisfied, the condition of the I/O pins (at access time) is indeterminate.
leading edge in read-write cycles.
t
t
CC1
CC1
OFF (MAX.)
WCS
IH (MIN.)
,
,
and
,
I
t
t
CC3
CWD
RWD
t
t
t
RCH
DZC
CDD
and
I
,
CC4
and
,
I
or
CC4
t
or
or
CWD
t
V
CWD (MIN.)
depend on output loading. Specified values are measured with the output open.
t
t
t
CAC
AA
t
t
IL (MAX.)
DZO
and
RRH
ODD
t
,
OEZ (MAX.)
.
t
.
AWD
must be satisfied.
must be satisfied for a read cycle.
must be satisfied.
I
CC6
t
t
,
are reference levels for measuring timing of input signals. Transition times
and
RCD (MAX.)
RAD (MAX.)
t
AWD
depend on cycle rate.
define the time at which the outputs achieve the open-circuit condition
t
t
t
RCD
CPWD
RAD
t
V
T
t
AWD (MIN.)
V
IH
= 5 ns.
is greater than the specified
is greater than the specified
limit ensures that
limit ensures that
are not restrictive operating parameters. They are included in the
SS
and
.
V
IL
and
t
.
PC
).
t
CPWD
9
t
WCS
t
t
RAC (MAX.)
RAC (MAX.)
V
t
CPWD (MIN.)
IL
. In the case of
t
WCS (MIN.)
can be met.
can be met.
t
t
RCD (MAX.)
, the cycle is a read-write cycle and
RAD (MAX.)
, the cycle is an early write cycle
HYB 514400BJ-50/-60
I
CC4
limit, then access time is
limit, then access time is
t
t
RCD (MAX.)
RAD (MAX.)
it can be changed once
1M
is specified as
is specified as
1998-10-01
t
4 DRAM
RWD
t
RWD

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