k4m56323pg Samsung Semiconductor, Inc., k4m56323pg Datasheet
k4m56323pg
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k4m56323pg Summary of contents
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... GENERAL DESCRIPTION The K4M56323PG is 268,435,456 bits synchronous high data rate Dynamic RAM organized 2,097,152 words by 32 bits, fabricated with SAMSUNG’s high performance CMOS technol- ogy ...
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... K4M56323PG-F(H)E/G/C/F FUNCTIONAL BLOCK DIAGRAM Bank Select CLK ADD LCKE LRAS LCBR CLK CKE CS Data Input Register Column Decoder Latency & Burst Length Programming Register LWE LCAS Timing Register RAS CAS WE Mobile-SDRAM LWCBR LDQM DQM January 2006 ...
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... K4M56323PG-F(H)E/G/C/F Package Dimension and Pin Configuration < Bottom View < Top View #A1 Ball Origin Indicator *1 > Pin Name > ...
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... K4M56323PG-F(H)E/G/C/F ABSOLUTE MAXIMUM RATINGS Parameter Voltage on any pin relative Voltage on V supply relative Storage temperature Power dissipation Short circuit current NOTES: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. Functional operation should be restricted to recommended operating condition. ...
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... In comercial Temp : 45°C/Max 70°C. In extended Temp : 45°C/Max 85° has +/-5 °C tolerance K4M56323PG-F(H)E K4M56323PG-F(H)G/F 7. DPD(Deep Power Down) function is an optional feature, and it will be enabled upon request. Please contact Samsung for more information. 8. Unless otherwise noted, input swing IeveI is CMOS(VIH /VIL=VDDQ/VSSQ -25 to 85° ...
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... K4M56323PG-F(H)E/G/C/F AC OPERATING TEST CONDITIONS Parameter AC input levels (Vih/Vil) Input timing measurement reference level Input rise and fall time Output timing measurement reference level Output load condition VDDQ 13.9KΩ Output 10.6KΩ Figure 1. DC Output Load Circuit (V = 1 Value 0 0 tr/tf = 1/1 0 See Figure 2 VOH (DC) = VDDQ - 0 ...
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... K4M56323PG-F(H)E/G/C/F OPERATING AC PARAMETER (AC operating conditions unless otherwise noted) Parameter Row active to row active delay RAS to CAS delay Row precharge time Row active time Row cycle time Last data in to row precharge Last data in to Active delay Last data in to new col. address delay ...
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... K4M56323PG-F(H)E/G/C/F AC CHARACTERISTICS (AC operating conditions unless otherwise noted) Parameter CAS latency=3 CLK cycle time CAS latency=2 CAS latency=1 CAS latency=3 CLK to valid output delay CAS latency=2 CAS latency=1 CAS latency=3 Output data hold time CAS latency=2 CAS latency=1 CLK high pulse width ...
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... K4M56323PG-F(H)E/G/C/F SIMPLIFIED TRUTH TABLE COMMAND Register Mode Register Set Auto Refresh Entry Refresh Self Refresh Exit Bank Active & Row Addr. Read & Auto Precharge Disable Column Address Auto Precharge Enable Write & Auto Precharge Disable Column Address Auto Precharge Enable ...
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... K4M56323PG-F(H)E/G/C/F A. MODE REGISTER FIELD TABLE TO PROGRAM MODES Register Programmed with Normal MRS BA0 ~ BA1 Address A11 ~ A10/AP "0" Setting for Function Normal MRS Normal MRS Mode Test Mode A8 A7 Type Mode Register Set Reserved Reserved Reserved ...
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... K4M56323PG-F(H)E/G/C/F Partial Array Self Refresh 1. In order to save power consumption, Mobile SDRAM has PASR option. 2. Mobile SDRAM supports 3 kinds of PASR in self refresh mode : Full array, 1/2 of full array, 1/4 of full array BA1=0 BA1=0 BA0=0 BA0=1 BA1=1 BA1=1 BA0=0 BA0=1 - Full Array Temperature Compensated Self Refresh 1. In order to save power consumption, Mobile-DRAM includes the internal temperature sonsor and control units to control the self refresh cycle automatically according to the two temperature range : 45 ° ...
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... K4M56323PG-F(H)E/G/C/F C. BURST SEQUENCE 1. BURST LENGTH = 4 Initial Address BURST LENGTH = 8 Initial Address Sequential ...