k4m56323pg Samsung Semiconductor, Inc., k4m56323pg Datasheet - Page 8
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k4m56323pg
Manufacturer Part Number
k4m56323pg
Description
2m X 32bit X 4 Banks Mobile Sdram In 90fbga
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.K4M56323PG.pdf
(12 pages)
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K4M56323PG-F(H)E/G/C/F
AC CHARACTERISTICS
NOTES :
1. Parameters depend on programmed CAS latency.
2. If clock rising time is longer than 1ns, (tr/2-0.5)ns should be added to the parameter.
3. Assumed input rise and fall time (tr & tf) = 1ns.
CLK cycle time
CLK to valid output delay
Output data hold time
CLK high pulse width
CLK low pulse width
Input setup time
Input hold time
CLK to output in Low-Z
CLK to output in Hi-Z
If tr & tf is longer than 1ns, transient time compensation should be considered,
i.e., [(tr + tf)/2-1]ns should be added to the parameter.
Parameter
CAS latency=3
CAS latency=2
CAS latency=1
CAS latency=3
CAS latency=2
CAS latency=1
CAS latency=3
CAS latency=2
CAS latency=1
CAS latency=3
CAS latency=2
CAS latency=1
(AC operating conditions unless otherwise noted)
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
SAC
SAC
SAC
t
t
t
SHZ
SLZ
OH
OH
OH
CC
CC
CC
CH
SS
SH
CL
Min
7.5
2.5
2.5
2.5
2.5
2.0
1.0
12
1
-
-
-75
1000
Max
6
9
6
9
-
-
Min
2.5
2.5
3.0
3.0
2.0
1.0
12
9
1
-
-
-90
1000
Max
7
9
7
9
-
-
Min
2.5
2.5
2.5
3.0
3.0
2.0
1.0
15
25
9
1
Mobile-SDRAM
-1L
1000
Max
10
20
10
20
7
7
Unit
January 2006
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note
1,2
1
2
3
3
3
3
2