hcts109t Intersil Corporation, hcts109t Datasheet

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hcts109t

Manufacturer Part Number
hcts109t
Description
Radiation Hardened Dual Jk Flip Flop
Manufacturer
Intersil Corporation
Datasheet
Radiation Hardened Dual JK Flip Flop
Intersil’s Satellite Applications Flow
tested and guaranteed to 100kRAD total dose. These QML
Class T devices are processed to a standard flow intended
to meet the cost and shorter lead-time needs of large
volume satellite manufacturers, while maintaining a high
level of reliability.
The Intersil HCTS109T is a Radiation Hardened Dual JK Flip
Flop with set and reset. The flip flop changes state with the
positive transition of the clock (CP1 or CP2).
Specifications
Specifications for Rad Hard QML devices are controlled by
the Defense Supply Center in Columbus (DSCC). The SMD
numbers listed below must be used when ordering.
Detailed Electrical Specifications for the HCTS109T are
contained in SMD 5962-95769. A “hot-link” is provided from
our website for downloading.
www.intersil.com/spacedefense/newsafclasst.asp
Intersil’s Quality Management Plan (QM Plan), listing all
Class T screening operations, is also available on our
website.
www.intersil.com/quality/manuals.asp
Ordering Information
NOTE:
distribution, or 450 units direct.
5962R9576901TEC
5962R9576901TXC
ORDERING
Minimum order quantity for -T is 150 units through
NUMBER
HCTS109DTR
HCTS109KTR
1
NUMBER
PART
TM
Data Sheet
(SAF) devices are fully
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
-55 to 125
-55 to 125
RANGE
TEMP.
(
o
C)
Features
• QML Class T, Per MIL-PRF-38535
• Radiation Performance
• 3 Micron Radiation Hardened SOS CMOS
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• LSTTL Input Logic Compatibility
• Input Current Levels Ii
Pinouts
www.intersil.com or 407-727-9207
- Gamma Dose ( ) 1 x 10
- Latch-Up Free Under Any Conditions
- SEP Effective LET No Upsets: >100 MEV-cm
- Single Event Upset (SEU) Immunity < 2 x 10
- V
- V
GND
Satellite Applications Flow™ (SAF) is a trademark of Intersil Corporation.
CP1
Errors/Bit-Day (Typ)
Q1
Q1
R1
K1
S1
J1
IL
IH
= 0.8V Max
= V
CC/2
HCTS109T (FLATPACK), CDFP4-F16
July 1999
HCTS109T (SBDIP), CDIP2-T16
GND
CP1
Min
Q1
Q1
K1
S1
J1
RI
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
TOP VIEW
TOP VIEW
5mA at V
5
|
RAD(Si)
Copyright
File Number 4624.1
16
15
14
13
12
11
10
OL
9
16
15
14
13
12
11
10
9
HCTS109T
, V
©
V
R2
J2
K2
CP2
S2
Q2
Q2
Intersil Corporation 1999
OH
CC
-9
2
/mg
V
R2
J2
K2
CP2
S2
Q2
Q2
CC

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hcts109t Summary of contents

Page 1

... The Intersil HCTS109T is a Radiation Hardened Dual JK Flip Flop with set and reset. The flip flop changes state with the positive transition of the clock (CP1 or CP2). ...

Page 2

... Functional Diagram V CC GND † Unpredictable and unstable condition if both S and R go high simultaneously. 2 HCTS109T 5 (11 (14 (13 (12 (15 TRUTH TABLE INPUTS ...

Page 3

... No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com 3 HCTS109T PASSIVATION: Type: Silox (S Thickness: 13k WORST CASE CURRENT DENSITY: < 2.0e5 A/cm TRANSISTOR COUNT: 268 PROCESS: CMOS SOS HCTS109T (2) (1) (16) (8) (9) (10) GND Q2 ...

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