hcts153ms Intersil Corporation, hcts153ms Datasheet

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hcts153ms

Manufacturer Part Number
hcts153ms
Description
Radiation Hardened Dual 4-input Multiplexer
Manufacturer
Intersil Corporation
Datasheet
September 1995
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
Features
• 3 Micron Radiation Hardened SOS CMOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm
• Single Event Upset (SEU) Immunity < 2 x 10
• Dose Rate Survivability: >1 x 10
• Dose Rate Upset >10
• Latch-Up Free Under Any Conditions
• Fanout (Over Temperature Range)
• Military Temperature Range -55
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range 4.5V to 5.5V
• LSTTL Input Compatibility
• Input Current Levels Ii
Description
The Intersil HCTS153MS is a Radiation Hardened dual
4-to-1 line selector/multiplexer which selects one of four
sources for each section by the common select inputs, S0
and S1. When the enable inputs (1E, 2E) are high, the
outputs are in the low logic state.
The HCTS153MS utilizes advanced CMOS/SOS technology
to achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCTS153MS is supplied in a 16 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
Ordering Information
HCTS153DMSR
HCTS153KMSR
HCTS153D/Sample
HCTS153K/Sample
HCTS153HMSR
Bit-Day (Typ)
- Standard Outputs 10 LSTTL Loads
- VIL = 0.8V Max
- VIH = VCC/2 Min
PART NUMBER
10
RAD (Si)/s 20ns Pulse
5 A at VOL, VOH
|
Copyright
TEMPERATURE RANGE
o
12
C to +125
©
-55
-55
RAD (Si)/s
Intersil Corporation 1999
o
o
C to +125
C to +125
+25
+25
+25
o
o
o
o
C
C
C
C
2
/mg
-9
o
o
C
C
Errors/
540
Pinouts
Intersil Class S Equivalent
Intersil Class S Equivalent
Sample
Sample
Die
HCTS153MS
GND
SCREENING LEVEL
1I3
1I2
1I1
1I0
1E
S1
Y1
FLATPACK PACKAGE (FLATPACK)
16 LEAD CERAMIC DUAL-IN-LINE
16 LEAD CERAMIC METAL SEAL
METAL SEAL PACKAGE (SBDIP)
GND
1I3
1I2
1I1
1I0
MIL-STD-1835 CDFP4-F16
1E
S1
Y1
MIL-STD-1835 CDIP2-T16
1
2
3
4
5
6
7
8
Dual 4-Input Multiplexer
1
2
3
4
5
6
7
8
TOP VIEW
TOP VIEW
Radiation Hardened
16 Lead SBDIP
16 Lead Ceramic Flatpack
16 Lead SBDIP
16 Lead Ceramic Flatpack
Die
16
15
14
13
12
11
10
9
Spec Number
16
15
14
13
12
11
10
9
File Number
PACKAGE
VCC
2E
S0
2I3
2I2
2I1
2I0
Y2
VCC
2E
S0
2I3
2I2
2I1
2I0
Y2
518609
2463.2

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hcts153ms Summary of contents

Page 1

... The HCTS153MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family. The HCTS153MS is supplied lead Ceramic flatpack (K suffi SBDIP Package (D suffix). Ordering Information PART NUMBER ...

Page 2

... Select inputs A and B are common to both sections H = High Level Low Level Immaterial HCTS153MS 2I1 2I0 TRUTH TABLE DATA INPUTS ...

Page 3

... VCC = 4.5V, VIH = 2.25V, Functional Test VIL = 0.8V (Note 2) NOTES: 1. All voltages referenced to device GND. 2. For functional tests, VO 4.0V is recognized as a logic “1”, and VO Specifications HCTS153MS Reliability Information Thermal Resistance SBDIP Package 10mA Ceramic Flatpack Package . . . . . . . . . . . 25mA Maximum Package Power Dissipation at +125 SBDIP Package ...

Page 4

... The parameters listed in Table 3 are controlled via design or process parameters. Min and Max Limits are guaranteed but not directly tested. These parameters are characterized upon initial design release and upon design changes which affect these characteristics. Specifications HCTS153MS GROUP (NOTES 1, 2) ...

Page 5

... AC measurements assume RL = 500 , CL = 50pF, Input 3ns, VIL = GND, VIH = 3V. 3. For functional tests VO 4.0V is recognized as a logic “1”, and VO TABLE 5. BURN-IN AND OPERATING LIFE TEST, DELTA PARAMETERS (+25 PARAMETER ICC IOL/IOH Specifications HCTS153MS (NOTES 1, 2) CONDITIONS TEMPERATURE 0.5V is recognized as a logic “0”. GROUP B SUBGROUP ...

Page 6

... Each pin except VCC and GND will have a resistor of 1K OPEN 7, 9 NOTE: Each pin except VCC and GND will have a resistor of 47K Group E, Subgroup 2, sample size is 4 dice/wafer 0 failures. Specifications HCTS153MS TABLE 6. APPLICABLE SUBGROUPS METHOD GROUP A SUBGROUPS 100%/5004 ...

Page 7

... Variables Data (All Delta operations). Data is identified by serial number. Data header includes lot number and date of test. • The Certificate of Conformance is a part of the shipping invoice and is not part of the Data Book. The Certificate of Conformance is signed by an authorized Quality Representative. HCTS153MS 100% Interim Electrical Test 1 (T1) 100% Delta Calculation (T0-T1) 100% Static Burn-In 2, Condition hrs ...

Page 8

... AC Timing Diagram VIH INPUT VS VIL TPLH VOH VS OUTPUT VOL TTLH VOH 80% 20% OUTPUT VOL AC VOLTAGE LEVELS PARAMETER HCTS VCC 4.50 VIH 3.00 VS 1.30 VIL 0 GND 0 HCTS153MS AC Load Circuit DUT TPHL CL = 50pF RL = 500 TTHL 80% 20% UNITS 547 TEST POINT CL RL 518609 Spec Number ...

Page 9

... Metallization Mask Layout 1I3 (3) 1I2 (4) 1I1 (5) 1I0 (6) NOTE: The die diagram is a generic plot from a similar HCS device intended to indicate approximate die size and bond pad location. The mask series for the HCTS153 is TA14469A. HCTS153MS HCTS153MS S1 1E VCC 2E (2) (1) (16) ...

Page 10

... For information regarding Intersil Corporation and its products, see web site http://www.intersil.com Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (407) 724-7000 FAX: (407) 724-7240 HCTS153MS EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ...

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