hcts299ms Intersil Corporation, hcts299ms Datasheet

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hcts299ms

Manufacturer Part Number
hcts299ms
Description
Rad-hard 8-bit Universal Shift Register; Three-state
Manufacturer
Intersil Corporation
Datasheet
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
Copyright © Intersil Americas Inc. 2002. All Rights Reserved
August 1995
Features
• 3 Micron Radiation Hardened CMOS SOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm
• Single Event Upset (SEU) Immunity < 2 x 10
• Dose Rate Survivability: >1 x 10
• Dose Rate Upset >10
• Latch-Up Free Under Any Conditions
• Fanout (Over Temperature Range)
• Military Temperature Range: -55
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• LSTTL Input Compatibility
• Input Current Levels Ii ≤ 5µA at VOL, VOH
Description
The Intersil HCTS299MS is a Radiation Hardened 8-bit shift/
storage register with three-state bus interface capability. The
register has four synchronous operating modes controlled by
the two select inputs (S0, S1). The mode select, the serial
data (DS0, DS7) and the parallel data (IO0 - IO7) respond
only to the low to high transition of the clock (CP) pulse. S0,
S1 and the data inputs must be one set up time period prior
to the clocks positive transition. The master reset (MR) is an
asynchronous active low input.
The HCTS299MS utilizes advanced CMOS/SOS technology
to achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family
with TTL input compatibility.
Ordering Information
HCTS299DMSR
HCTS299KMSR
HCTS299D/Sample
HCTS299K/Sample
HCTS299HMSR
Bit-Day (Typ)
-Bus Driver Outputs: 15 LSTTL Loads
-VIL = 0.8V Max
-VIH = VCC/2 Min
PART NUMBER
|
Intersil (and design) is a trademark of Intersil Americas Inc.
TM
10
RAD (Si)/s 20ns Pulse
TEMPERATURE RANGE
12
o
C to +125
RAD (Si)/s
-55
-55
o
o
C to +125
C to +125
+25
+25
+25
o
o
o
o
C
C
C
C
2
/mg
-9
o
o
C
C
Errors/
8-Bit Universal Shift Register; Three-State
624
Pinouts
Intersil Class S Equivalent
Intersil Class S Equivalent
Sample
Sample
Die
HCTS299MS
GND
OE1
OE2
I/O6
I/O4
I/O2
I/O0
MR
Q0
SCREENING LEVEL
S0
FLATPACK PACKAGE (FLATPACK)
20 LEAD CERAMIC DUAL-IN-LINE
20 LEAD CERAMIC METAL SEAL
METAL SEAL PACKAGE (SBDIP)
GND
OE1
OE2
I/O6
I/O4
I/O2
I/O0
MR
Q0
MIL-STD-1835 CDFP4-F20
S0
MIL-STD-1835 CDIP2-T20
10
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
10
TOP VIEW
TOP VIEW
Radiation Hardened
20 Lead SBDIP
20 Lead Ceramic Flatpack
20 Lead SBDIP
20 Lead Ceramic Flatpack
Die
20
19
18
17
16
15
14
13
12
11
20
19
18
17
16
15
14
13
12
11
Spec Number
PACKAGE
VCC
S1
DS7
Q7
I/O7
I/O5
I/O3
I/O1
CP
DS0
FN3069.1
518640
VCC
S1
DS7
Q7
I/O7
I/O5
I/O3
I/O1
CP
DS0

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hcts299ms Summary of contents

Page 1

... VCC/2 Min • Input Current Levels Ii ≤ 5µA at VOL, VOH Description The Intersil HCTS299MS is a Radiation Hardened 8-bit shift/ storage register with three-state bus interface capability. The register has four synchronous operating modes controlled by the two select inputs (S0, S1). The mode select, the serial data (DS0, DS7) and the parallel data (IO0 - IO7) respond only to the low to high transition of the clock (CP) pulse ...

Page 2

... Functional Block Diagram STANDARD OUTPUT S1 DS7 Q7 I/ VCC OE1 OE2 HCTS299MS BUS LINE OUTPUTS I/O5 I/ ...

Page 3

... Input Voltage High One Setup Time Prior Clock Transition l = Input voltage Low One Setup Time Prior Clock Transition = Low-to-High Clock Transition qn = Lower Case Letter Indicates the State of the Referenced Output One Setup Time Prior Clock Transition HCTS299MS TRUTH TABLE Register Operating Modes INPUTS ...

Page 4

... VIL = 0.8V (Note 2) NOTES: 1. All voltages referenced to device GND. 2. For functional tests, VO ≥ 4.0V is recognized as a logic “1”, and VO ≤ 0.5V is recognized as a logic “0”. Specifications HCTS299MS Reliability Information Thermal Resistance SBDIP Package ...

Page 5

... VCC = 5.0V 1MHz Dissipation Input Capacitance CIN VCC = 5.0V 1MHz Output Transition TTHL, VCC = 4.5V Time TTLH Max Operating FMAX VCC = 4.5V Frequency Setup Time DS0, TSU VCC = 4.5V DS7, I/On to CLK Specifications HCTS299MS GROUP (NOTES SUB- CONDITIONS GROUPS TEMPERATURE 9 10, 11 +125 9 10, 11 +125 9 10, 11 +125 9 10, 11 ...

Page 6

... Three-State Output IOZ Applied Voltage = 0V or VCC, VCC = 5.5V Leakage Current Noise Immunity FN VCC = 4.5V, VIH = 2.25V, Functional Test VIL = 0.8V, (Note 3) CLK to I/On TPHL, VCC = 4.5V TPLH CLK to Q0, Q7 TPHL, VCC = 4.5V TPLH Specifications HCTS299MS CONDITIONS NOTES TEMPERATURE 1 1 +125 1 1 +125 1 1 +125 1 1 +125 1 ...

Page 7

... Interim Test II (Postburn-In) PDA Interim Test III (Postburn-In) PDA Final Test Group A (Note 1) Group B Subgroup B-5 Subgroup B-6 Group D NOTE: 1. Alternate Group A Inspection in accordance with Method 5005 of MIL-STD-883 may be exercised. Specifications HCTS299MS (NOTES 1, 2) CONDITIONS TEMPERATURE GROUP B SUBGROUP DELTA LIMIT 5 5 -15 Hour 5 TABLE 6 ...

Page 8

... Each pin except VCC and GND will have a resistor of 680Ω ± 5% for dynamic burn-in OPEN 8, 17 NOTE: Each pin except VCC and GND will have a resistor of 47KΩ ± 5% for irradiation testing. Group E, Subgroup 2, sample size is 4 dice/wafer 0 failures. HCTS299MS TABLE 7. TOTAL DOSE IRRADIATION TEST PRE RAD POST RAD ...

Page 9

... Suite 100 Palm Bay, FL 32905 Irvine, CA 92618 TEL: (321) 724-7000 TEL: (949) 341-7000 FAX: (321) 724-7946 FAX: (949) 341-7123 HCTS299MS 100% Interim Electrical Test 1 (T1) 100% Delta Calculation (T0-T1) 100% Static Burn-In 2, Condition hrs. min., o +125 C min., Method 1015 100% Interim Electrical Test 2 (T2) ...

Page 10

... DS0, DS7 OR I/On TH(L) TSU(L) TSU( FIGURE 3. DATA PRE-REQUISITE TIMES AC VOLTAGE LEVELS PARAMETER HCTS VCC 4.50 VIH 3.00 VS 1.30 VIL 0 GND 0 Specifications HCTS299MS INPUT LEVEL TPLH FIGURE 2. MASTER RESET PRE-REQUISITE AND PROPAGA- TION DELAYS VS VS TH(H) VOH VS VOL FIGURE 4. OUTPUT TRANSITION TIME DUT UNITS V V ...

Page 11

... Three-State High Timing Diagrams VIH INPUT VS VIL TPZH VOH VT OUTPUT VOZ Three-State HIGH VOLTAGE LEVELS PARAMETER HCTS VCC 4.50 VIH 3.00 VS 1.30 VT 1.30 VW 3.60 VIL 0 GND 0 HCTS299MS Three-State Low Load Circuit TPLZ VW UNITS Three-State High Load Circuit DUT TPHZ VW UNITS 634 VCC RL ...

Page 12

... OE2 (3) I/O6 (4) I/O4 (5) I/O2 (6) I/O0 (7) Q0 (8) NOTE: The die diagram is a generic plot from a similar HCS device intended to indicate approximate die size and bond pad location. The mask series for the HCTS299 is TA14480A. HCTS299MS HCTS299MS 635 (18) DS7 (17) Q7 (16) I/O7 (15) I/O5 (14) I/O3 (13) I/O1 518640 Spec Number ...

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