hcts20ms Intersil Corporation, hcts20ms Datasheet
hcts20ms
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hcts20ms Summary of contents
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... NAND Gate. A low on any input forces the output to a High state. The HCTS20MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radia- tion hardened, high-speed, CMOS/SOS Logic Family. The HCTS20MS is supplied lead Ceramic flatpack (K suffix SBDIP Package (D suffix). Ordering Information PART ...
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... VIL = 0.80V (Note 2) NOTES: 1. All voltages reference to device GND. 2. For functional tests VO ≥ 4.0V is recognized as a logic “1”, and VO ≤ 0.5V is recognized as a logic “0”. Specifications HCTS20MS Reliability Information Thermal Resistance SBDIP Package ...
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... NOTES: 1. All voltages referenced to device GND measurements assume RL = 500Ω 50pF, Input 3ns, VIL = GND, VIH = 3V. 3. For functional tests VO ≥ 4.0V is recognized as a logic “1”, and VO ≤ 0.5V is recognized as a logic “0”. Specifications HCTS20MS GROUP (NOTES SUB- ...
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... Group D NOTE: 1. Alternate group A inspection in accordance with Method 5005 of MIL-STD-883 may be exercised. CONFORMANCE GROUPS METHOD Group E Subgroup 2 5005 NOTE: 1. Except FN test which will be performed 100% Go/No-Go. Specifications HCTS20MS GROUP B SUBGROUP DELTA LIMIT 5 5 -15 Hour TABLE 6. APPLICABLE SUBGROUPS METHOD GROUP A SUBGROUPS 100%/5004 ...
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... Each pin except VCC and GND will have a resistor of 1KΩ ± 5% for dynamic burn-in OPEN NOTE: Each pin except VCC and GND will have a resistor of 47KΩ ± 5% for irradiation testing. Group E, Subgroup 2, sample size is 4 dice/wafer 0 failures. Specifications HCTS20MS 1/2 VCC = 3V ± 0.5V VCC = 6V ± 0. ...
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... Variables Data (All Delta operations). Data is identified by serial number. Data header includes lot number and date of test. • The Certificate of Conformance is a part of the shipping invoice and is not part of the Data Book. The Certificate of Conformance is signed by an authorized Quality Representative. HCTS20MS 100% Interim Electrical Test 1 (T1) 100% Delta Calculation (T0-T1) 100% Static Burn-In 2, Condition hrs ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com HCTS20MS AC Load Circuit DUT ...
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... Metallization Mask Layout B1 (2) NC (3) C1 (4) D1 (5) NOTE: The die diagram is a generic plot from a similar HCS device intended to indicate approximate die size and bond pad location. The mask series for the HCTS20 is TA14426A. HCTS20MS HCTS20MS A1 VCC D2 (1) (14) (13) (6) (7) ...