hcts393ms Intersil Corporation, hcts393ms Datasheet
hcts393ms
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hcts393ms Summary of contents
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... The HCTS393MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family. The HCTS393MS is supplied lead Ceramic flatpack (K suffi SBDIP Package (D suffix). Ordering Information PART NUMBER ...
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... HCTS393MS 3(11) 4(10 High Lvel L = Low Logic Level Immaterial = Low-to-High High-to-Low ...
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... VCC = 4.5V, VIH = 2.25V, Functional Test VIL = 0.8V (Note 2) NOTES: 1. All voltages referenced to device GND. 2. For functional tests, VO 4.0V is recognized as a logic “1”, and VO Specifications HCTS393MS Reliability Information Thermal Resistance SBDIP Package 10mA Ceramic Flatpack Package . . . . . . . . . . . 25mA Maximum Package Power Dissipation at +125 SBDIP Package ...
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... The parameters listed in Table 3 are controlled via design or process parameters. Min and Max Limits are guaranteed but not directly tested. These parameters are characterized upon initial design release and upon design changes which affect these characteristics. Specifications HCTS393MS GROUP (NOTES 1, 2) ...
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... AC measurements assume RL = 500 , CL = 50pF, Input 3ns, VIL = GND, VIH = 3V. 3. For functional tests VO 4.0V is recognized as a logic “1”, and VO TABLE 5. BURN-IN AND OPERATING LIFE TEST, DELTA PARAMETERS (+25 PARAMETER ICC IOL/IOH Specifications HCTS393MS (NOTES 1, 2) CONDITIONS TEMPERATURE 0.5V is recognized as a logic “0”. GROUP B SUBGROUP ...
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... Each pin except VCC and GND will have a resistor of 1K OPEN NOTE: Each pin except VCC and GND will have a resistor of 47K Group E, Subgroup 2, sample size is 4 dice/wafer 0 failures. Specifications HCTS393MS TABLE 6. APPLICABLE SUBGROUPS METHOD GROUP A SUBGROUPS 100%/5004 ...
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... Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (321) 724-7000 FAX: (321) 724-7240 HCTS393MS 100% Interim Electrical Test 1 (T1) 100% Delta Calculation (T0-T1) 100% Static Burn-In 2, Condition hrs. min., o +125 C min., Method 1015 ...
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... CP TW TPLH Qn VS FIGURE 1. CLOCK PRE-REQUISITE AND PROPAGATION DE- LAY, AND OUTPUT-TRANSITION TIMES TTLH VOH 80% 20% OUTPUT VOL FIGURE 3. OUTPUT TRANSITION TIME AC Load Circuit HCTS393MS INPUT LEVEL TPHL VS Qn FIGURE 2. MASTER RESET PRE-REQUISITE AND PROPAGA- TION DELAYS PARAMETER VCC VIH ...
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... Metallization Mask Layout (4) NOTE: The die diagram is a generic plot from a similar HCS device intended to indicate approximate die size and bond pad location. The mask series for the HCTS393 is TA14490A. HCTS393MS HCTS393MS 680 (11 (10 518633 Spec Number ...