hx6228 Mospec Semiconductor Corp., hx6228 Datasheet

no-image

hx6228

Manufacturer Part Number
hx6228
Description
128k X 8 Static Ram-soi Hx6228
Manufacturer
Mospec Semiconductor Corp.
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
hx6228TVRT
Manufacturer:
TRW/TRC
Quantity:
37
Part Number:
hx6228TVRT 5962R9853702VXC
Manufacturer:
a
Quantity:
35
Military & Space Products
128K x 8 STATIC RAM—SOI
FEATURES
RADIATION
• Fabricated with RICMOS™ IV Silicon on Insulator (SOI)
• Total Dose Hardness through 1x10
• Neutron Hardness through 1x10
• Dynamic and Static Transient Upset Hardness
• Dose Rate Survivability through <1x10
• Soft Error Rate of <1x10
• No Latchup
GENERAL DESCRIPTION
The 128K x 8 Radiation Hardened Static RAM is a high
performance 131,072 word x 8-bit static random access
memory with industry-standard functionality. It is fabricated
with Honeywell’s radiation hardened technology, and is
designed for use in systems operating in radiation environ-
ments. The RAM operates over the full military temperature
range and requires only a single 5 V ± 10% power supply. The
RAM is wire bond programmable for either TTL or CMOS
compatible I/O. Power consumption is typically less than 25
mW/MHz in operation, and less than 5 mW in the low power
disabled mode. The RAM read operation is fully asynchro-
nous, with an associated typical access time of 15 ns at 5V.
Honeywell’s enhancedSOI RICMOS™IV (Radiation Insen-
sitive CMOS) technology is radiation hardened through the
use of advanced and proprietary design, layout and process
hardening techniques. The RICMOS™ IV process is an
advanced 5-volt, SIMOX CMOS technology with a 150 Å
gate oxide and a minimum feature size of 0.7 µm (0.55 µm
effective gate length—L
Honeywell’s proprietary SHARP planarization process, and
a lightly doped drain (LDD) structure for improved short
channel reliability. A 7 transistor (7T) memory cell is used for
superior single event upset hardening, while three layer
metal power bussing and the low collection volume SIMOX
substrate provide improved dose rate hardening.
0.7 µm Process (L
through 1x10
Geosynchronous Orbit
11
rad (Si)/s
eff
= 0.55 µm)
eff
-10
). Additional features include
upsets/bit-day in
14
cm
6
rad(SiO
-2
12
rad(Si)/s
2
)
OTHER
• Read/Write Cycle Times
• Typical Operating Power <25 mW/MHz
• Asynchronous Operation
• CMOS or TTL Compatible I/O
• Single 5 V ± 10% Power Supply
• Packaging Options
≤ 16 ns (Typical)
≤ 25 ns (-55 to 125°C)
- 32-Lead Flat Pack (0.820 in. x 0.600 in.)
- 40-Lead Flat Pack (0.775 in. x 0.710 in.)
HX6228

Related parts for hx6228

hx6228 Summary of contents

Page 1

... Typical Operating Power <25 mW/MHz cm -2 • Asynchronous Operation • CMOS or TTL Compatible I/O • Single 5 V ± 10% Power Supply 12 rad(Si)/s • Packaging Options - 32-Lead Flat Pack (0.820 in. x 0.600 in.) - 40-Lead Flat Pack (0.775 in. x 0.710 in.) HX6228 ...

Page 2

... HX6228 FUNCTIONAL DIAGRAM A:3-7,12,14- NCS NWE NOE A:0-2, 8-11 SIGNAL DEFINITIONS A: 0-16 Address input pins which select a particular eight-bit word within the memory array. DQ: 0-7 Bidirectional data pins which serve as data outputs during a read operation and as data inputs during a write operation. NCS Not chip select, when at a low level allows normal operation. When at a high level NCS forces the SRAM to a precharge condition, holds the data output drivers in a high impedance state and disables all the input buffers except CE ...

Page 3

... N/cm 9 rad(Si))/s for 32-lead flat pack. Stiffening capacitance is suggested for optimum expected 3 HX6228 Test Conditions ) T =25° Pulse width ≤1 µs Pulse width ≤50 ns, X-ray, VDD=6 =25° =125°C, Adams 90% A worst case environment ...

Page 4

... HX6228 ABSOLUTE MAXIMUM RATINGS (1) Symbol Parameter VDD Supply Voltage Range (2) VPIN Voltage on Any Pin (2) TSTORE Storage Temperature (Zero Bias) TSOLDER Soldering Temperature (5 Seconds) PD Maximum Power Power Dissipation (3) IOUT DC or Average Output Current VPROT ESD Input Protection Voltage (4) Θ JC Thermal Resistance (Jct-to-Case) ...

Page 5

... V -0.1 DD 2.9 V Valid high + output Vref1 - 249 Vref2 + Valid low - output C L >50 pF for TWLQZ, TSHQZ, TELQZ, and TGHQZ 5 HX6228 (2) Units Test Conditions Max VIH=VDD, IO=0, 2.0 mA VIL=VSS, f=0MHz NCS=VDD, IO=0, 2.0 mA f=40 MHz, f=1 MHz, IO=0, CE=VIH=VDD 6.0 mA NCS=VIL=VSS (3) f=1 MHz, IO=0, CE=VIH=VDD 4.5 mA NCS=VIL=VSS (3) +5 µA VSS≤VI≤VDD VSS≤ ...

Page 6

... HX6228 READ CYCLE AC TIMING CHARACTERISTICS (1) Symbol Parameter TAVAVR Address Read Cycle Time TAVQV Address Access Time TAXQX Address Change to Output Invalid Time TSLQV Chip Select Access Time TSLQX Chip Select Output Enable Time TSHQZ Chip Select Output Disable Time TEHQV Chip Enable Access Time ...

Page 7

... IMPEDANCE DATA IN NCS CE Typical ( AVAVW T AVWH T WLWH T WLQZ T DVWH DATA VALID T SLWH T EHWH 7 HX6228 Worst Case (3) ° -55 to 125 C Units Min Max ...

Page 8

... HX6228 DYNAMIC ELECTRICAL CHARACTERISTICS Read Cycle The RAM is asynchronous in operation, allowing the read cycle to be controlled by address, chip select (NCS), or chip enable (CE) (refer to Read Cycle timing diagram). To perform a valid read operation, both chip select and output enable (NOE) must be low and chip enable and write enable (NWE) must be high ...

Page 9

... Groups B & D testing as outlined in MIL-STD-883, TM 5005, Class S. The product is quali- fied by following a screening and testing flow to meet the customer’s requirements. Quality conformance testing is performed as an option on all production lots to ensure the ongoing reliability of the product. 9 HX6228 VDD/2 VDD/2 VDD-0.4V High Z 0.4 V ...

Page 10

... HX6228 PACKAGING The 128K x 8 SOI SRAM is offered in a custom 32-lead or 40-lead Flat Pack. The package is constructed of multilayer ceramic ( and features internal power and ground 2 3 planes. Ceramic chip capacitors can be mounted to the package by the user to maximize supply noise decoupling and increase ...

Page 11

... Top View Kovar Lid [ (Pedestal) Non-Conductive Tie-Bar Bottom View HX6228 S b (width) e (pitch) All dimensions are in inches A 0.131 ± .015 b 0.008 ± 0.002 c 0.006 ± 0.0015 D 0.710 ±0.010 E 0.775 ± 0.007 e 0.025 ± 0.004 F 0.475 ± 0.005 G 0.760 ± ...

Page 12

... HX6228 DYNAMIC BURN-IN DIAGRAM* 1 VDD NC 2 A15 A16 F17 R 3 A14 CE F16 R 4 A12 NWE A13 A11 NOE A10 NCS F13 R 12 DQ7 A0 F14 R 13 DQ6 DQ0 ...

Related keywords