hx6228 Mospec Semiconductor Corp., hx6228 Datasheet - Page 2

• Manufacturer Part Number: hx6228
• Description: 128k X 8 Static Ram-soi Hx6228
• Manufacturer: Mospec Semiconductor Corp.

HX6228
FUNCTIONAL DIAGRAM
SIGNAL DEFINITIONS
A: 0-16
DQ: 0-7
NCS
NWE
NOE
CE
TRUTH TABLE
CE
H
H
X
L
CE
NCS
NWE
NOE
A:0-2, 8-11, 13
A:3-7,12,14-16
Address input pins which select a particular eight-bit word within the memory array.
Bidirectional data pins which serve as data outputs during a read operation and as data inputs during a write
operation.
Not chip select, when at a low level allows normal operation. When at a high level NCS forces the SRAM to
a precharge condition, holds the data output drivers in a high impedance state and disables all the input
buffers except CE. If this signal is not used it must be connected to VSS.
Negative write enable, when at a low level activates a write operation and holds the data output drivers in
a high impedance state. When at a high level NWE allows normal read operation.
Negative output enable, when at a high level holds the data output drivers in a high impedance state. When
at a low level, the data output driver state is defined by NCS, NWE and CE. If this signal is not used it must
be connected to VSS.
Chip enable, when at a high level allows normal operation. When at a low level CE forces the SRAM to a
precharge condition, holds the data output drivers in a high impedance state and disables all the input buffers
except the NCS input buffer. If this signal is not used it must be connected to VDD.
NCS
H
X
L
L
NWE
XX
XX
H
L
8
9
NOE
XX
XX
L
X
Decoder
Deselected
Row
Disabled
MODE
Read
Write
WE • CS • CE
NWE • CS • CE • OE
2
(0 = high Z)
•
•
•
Data Out
Data In
High Z
High Z
DQ
Column Decoder
Data Input/Output
131,072 x 8
Memory
•
Array
Notes:
NOE=H: High Z output state maintained
•
•
XX: VSS≤VI≤VDD
X: VI=VIH or VIL
for NCS=X, CE=X, NWE=X
Signal
All controls must be
enabled for a signal to
pass. (#: number of
buffers, default = 1)
8
#
1 = enabled
8
Signal
DQ:0-7