hx6256 Honeywell International's Solid State Electronics Center (SSEC), hx6256 Datasheet - Page 2

• Manufacturer Part Number: hx6256
• Description: 32k X 8 Static Ram Solid State Electronics Center
• Manufacturer: Honeywell International's Solid State Electronics Center (SSEC)

HX6256
FUNCTIONAL DIAGRAM
SIGNAL DEFINITIONS
A: 0-14
DQ: 0-7 Bidirectional data pins which serve as data outputs during a read operation and as data inputs during a write
NCS
NWE
NOE
CE*
TRUTH TABLE
*Not Available in 28-lead DIP or 28-Lead Flat Pack
2
NCS
H
X
L
L
Address input pins which select a particular eight-bit word within the memory array.
operation.
Negative chip select, when at a low level allows normal read or write operation. When at a high level NCS
forces the SRAM to a precharge condition, holds the data output drivers in a high impedance state and disables
all input buffers except CE. If this signal is not used it must be connected to VSS.
Negative write enable, when at a low level activates a write operation and holds the data output drivers in a high
impedance state. When at a high level NWE allows normal read operation.
Negative output enable, when at a high level holds the data output drivers in a high impedance state. When at a
low level, the data output driver state is defined by NCS, NWE and CE. If this signal is not used it must be
connected to VSS.
Chip enable, when at a high level allows normal operation. When at a low level CE forces the SRAM to a
precharge condition, holds the data output drivers in a high impedance state and disables all the input buffers
except the NCS input buffer. If this signal is not used it must be connected to VDD.
CE*
H
H
X
L
NWE
XX
XX
H
L
NOE
XX
XX
X
L
Deselected
Disabled
MODE
Read
Write
Data Out
Data In
High Z
High Z
DQ
Notes:
X:
XX:
NOE=H: High Z output state
www.honeywell.com/radhard
VI=VIH or VIL
VSS^VI^VDD
maintained for NCS=X,
CE=X, NWE=X