k6t1008c2e Samsung Semiconductor, Inc., k6t1008c2e Datasheet - Page 5

• Manufacturer Part Number: k6t1008c2e
• Description: 128kx8 Bit Low Power Cmos Static Ram
• Manufacturer: Samsung Semiconductor, Inc.

AC CHARACTERISTICS
K6T1008C2E Family
DATA RETENTION CHARACTERISTICS
1. CS
AC OPERATING CONDITIONS
TEST CONDITIONS
Vcc for data retention
Data retention current
Data retention set-up time
Recovery time
Read
Write
Input pulse level: 0.8 to 2.4V
Input rising and falling time: 5ns
Input and output reference voltage:1.5V
Output load(see right): C
1
Vcc-0.2V, CS
Read Cycle Time
Address Access Time
Chip Select to Output
Output Enable to Valid Output
Chip Select to Low-Z Output
Output Enable to Low-Z Output
Chip Disable to High-Z Output
Output Disable to High-Z Output
Output Hold from Address Change
Write Cycle Time
Chip Select to End of Write
Address Set-up Time
Address Valid to End of Write
Write Pulse Width
Write Recovery Time
Write to Output High-Z
Data to Write Time Overlap
Data Hold from Write Time
End Write to Output Low-Z
Item
2
Vcc-0.2V(CS
( Test Load and Input/Output Reference)
C
Parameter List
L
=50pF+1TTL
L
=100pF+1TTL
1
controlled) or CS
Symbol
(V
V
t
t
I
RDR
SDR
CC
DR
DR
=4.5~5.5V, Commercial Product: T
CS
Vcc=3.0V, CS
See data retention waveform
2
1
0.2V(CS
Vcc-0.2V
2
controlled)
1
1)
Vcc-0.2V
5
Test Condition
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
WHZ
t
t
t
t
OHZ
t
t
1)
t
OLZ
WC
CW
AW
WP
WR
DW
OW
RC
CO
OE
OH
DH
AA
HZ
AS
LZ
A
=0 to 70 C, Industrial Product: T
1. Including scope and jig capacitance
K6T1008C2E-L
K6T1008C2E-B
K6T1008C2E-P
K6T1008C2F-F
C
Min
55
10
10
55
45
45
40
20
L
5
0
0
0
0
0
0
5
-
-
-
1)
55ns
Max
55
55
25
20
20
20
Speed Bins
-
-
-
-
-
-
-
-
-
-
-
-
-
Min
2.0
0
5
-
-
-
-
Min
CMOS SRAM
70
10
10
70
60
60
50
25
5
0
0
0
0
0
0
5
-
-
-
A
70ns
=-40 to 85 C
Typ
-
-
-
-
-
-
-
Max
70
70
35
25
25
25
-
-
-
-
-
-
-
-
-
-
-
-
-
Max
5.5
Revision 3.0
20
10
25
10
-
-
March 2000
)
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Unit
ms
V
A