km29u128t Samsung Semiconductor, Inc., km29u128t Datasheet - Page 23

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km29u128t

Manufacturer Part Number
km29u128t
Description
16m X 8 Bit Nand Flash Memory
Manufacturer
Samsung Semiconductor, Inc.
Datasheet

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Part Number:
KM29U128T
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BLOCK ERASE
The Erase operation is done on a block(16K Byte) basis. Block address loading is accomplished in two cycles initiated by an Erase
Setup command(60H). Only address A
block address loading initiates the internal erasing process. This two-step sequence of setup followed by execution command
ensures that memory contents are not accidentally erased due to external noise conditions.
At the rising edge of WE after the erase confirm command input, the internal write controller handles erase, erase-verify and pulse
repetition where required. When the erase operation is completed, the Write Status Bit(I/O 0) may be checked.
Figure 8 details the sequence.
READ STATUS
The device contains a Status Register which may be read to find out whether program or erase operation is completed, and whether
the program or erase operation is completed successfully. After writing 70H command to the command register, a read cycle outputs
the content of the Status Register to the I/O pins on the falling edge of CE or RE, whichever occurs last. This two line control allows
the system to poll the progress of each device in multiple memory connections even when R/B pins are common-wired. RE or CE
does not need to be toggled for updated status. Refer to table 2 for specific Status Register definitions. The command register
remains in Status Read mode until further commands are issued to it. Therefore, if the status register is read during a random read
cycle, a read command(00H or 50H) should be given before sequential page read cycle.
KM29U128T, KM29U128IT
Figure 8. Block Erase Operation
R/B
I/O
Table2. Status Register Definition
0
~
7
I/O 0
I/O 1
I/O 2
I/O 3
I/O 4
I/O 5
I/O 6
I/O 7
SR
60H
Block Add. : A
Address Input(2Cycle)
14
to A
9
~ A
Reserved for Future
23
Device Operation
Program / Erase
23
is valid while A
Write Protect
Status
Use
D0H
9
to A
23
13
t
BERS
is ignored. The Erase Confirm command(D0H) following the
"0" : Successful Program / Erase
"1" : Error in Program / Erase
"0"
"0"
"0"
"0"
"0"
"0" : Busy
"0" : Protected
70H
FLASH MEMORY
Definition
"1" : Not Protected
"1" : Ready
Fail
I/O
0
Pass

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