lc8905v Sanyo Semiconductor Corporation, lc8905v Datasheet - Page 8

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lc8905v

Manufacturer Part Number
lc8905v
Description
Digital Audio Interface Receiver
Manufacturer
Sanyo Semiconductor Corporation
Datasheet
Functions
1. Data Input and Output (DIN1, DIN2, E/DOUT)
2. PLL (R, VIN, VCO, AVOCK)
3. Clock Settings and Output (FS128, BCK, LRCK, DATAOUT, CKSEL, CKOUT)
The DIN1 pin has a built-in amplifier, and can receive signals with an amplitude of about 400 mVp-p (coaxial input).
The DIN2 pin is only for use with optical modules.
Note that although the data input pins are controlled by the microprocessor, DIN1 can be selected when a
microprocessor is not used. The microprocessor interface pins must be tied low in such applications.
The E/DOUT normally outputs channel status information. However, it can be set to output either the input bi-phase
data or the validity flag by command codes from the microprocessor.
This circuit includes a built-in VCO and supports sampling frequencies of 32, 44.1, and 48 kHz.
The resistor connected to R functions as both the VCO gain control and as temperature compensation. The VIN pin
sets the VCO free-running frequency.
The PLL circuit can be reset within a fixed period when it operates incorrectly, for example, if a lock pull-in failure
occurs, by inputting an asynchronous, continuously operating clock signal to the AVOCK pin.
A 128fs clock signal is output from the FS128 pin. Figure 1 shows the output timing for the BCK, LRCK, and
DATAOUT pins.
The CKOUT clock output is set by the CKSEL pin as listed in the table below.
The microprocessor interface format is also set by CKSEL as listed in the table below.
CKSEL
CKSEL
H
H
L
L
384fs clock output
512fs clock output
Figure 2
Figure 3
Microprocessor interface
CKOUT
LC8905V
No. 5237-8/16

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