lc8902 Sanyo Semiconductor Corporation, lc8902 Datasheet - Page 10

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lc8902

Manufacturer Part Number
lc8902
Description
Digital Audio Interface Receiver
Manufacturer
Sanyo Semiconductor Corporation
Datasheet
FS Output Code
The SUB1 and SUB2 pins indicate the input data sampling frequency.
Note: The “#1” values indicates PLL lock error or analog source mode. When SUB1 and SUB2 have these values, the DATAOUT and EMPHA pins will
CD Subcode Interface
The LC8902/Q uses the SFSY, SBCK, PW and SBSY pins to output the CD subcode data. This data is the user bits that
were transferred according to the CP-1201 interface format and converted to a format that conforms to the CP-2401
interface format. The timing is shown in the figures.
The timing of the rising and falling edges of the SFSY signal is changed according to the timing of the start bits in the
input data user bits as shown in the figure.
Sampling frequency
output low levels.
SUB1
SUB2
32 kHz
H
H
44.1 kHz
L
L
48 kHz
H
L
LC8902, 8902Q
#1
H
L
No. 4333-10/14

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