w65c265s Western Design Center, Inc., w65c265s Datasheet - Page 17
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w65c265s
Manufacturer Part Number
w65c265s
Description
W65c265s 16?bit Microcontroller
Manufacturer
Western Design Center, Inc.
Datasheet
1.W65C265S.pdf
(60 pages)
Notes:
*1 Read only from Host or Processor
*2 Read only from Processor, Read or Write from Host
*3 Read only from Host, Read or Write from Processor
*4 Read only from Host or Processor, will always read back a zero.
7
7
*3
*1
6
6
Figure 1-12 Parallel Interface Bus Enable (PIBER) and Flag (PIBFR) Registers
*2
*1
5
5
Automatic Handshake Input Data Available in PIR7 (Reg. 7)
*3
*2
Automatic Handshake Output Data Available in PIR7 (Reg. 7)
1 = Host Write to PIR7 and Interrupt Processor
0 = Reset or Processor Read of PIR7
4
4
1 = Processor Write to PIR7 and Interrupt Host
*2
*3
1 = Write "1" from Host and Interrupt Processor
0 = Reset or Host Read of PIR7
Automatic Handshake Input Data Available in PIR3 (Reg. 3)
3
3
1 = Write "1" from Processor and Interrupt Host
0 = Reset or Write "0" from Host
*3
*1
Manual Handshake from Host
0 = Reset or Write "0" from Processor
Manual Handshake from Processor
1 = Host Write to PIR3 and Interrupt Processor
Automatic Handshake Output Data Available in PIR3
0 = Reset or Processor Read of PIR3
2
2
1 = Processor Write to PIR3 and Interrupt Host
*2
*1
0 = Reset or Host Read of PIR3
1
1
*3
*4
Enable RDB and WRB
(Reg. 3)
0 = CSB and WEB
1 = CS and WEB
Enable Parallel Interface
0
0
*3
*4
0 = Disable PIB
1 = Enable PIB
PIBER ($DF79)
PIBFR ($DF78)
1 = Enable
0= Disable
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