w65c265s Western Design Center, Inc., w65c265s Datasheet - Page 21
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w65c265s
Manufacturer Part Number
w65c265s
Description
W65c265s 16?bit Microcontroller
Manufacturer
Western Design Center, Inc.
Datasheet
1.W65C265S.pdf
(60 pages)
The W65C816S Microprocessor Programming Model, System Memory Map, I/O Memory Map, Vector
Table, and Pin Map summarize the W65C265S Programming Model and gives the functional area where
each memory and pin is defined.
The W65C265S completely decodes the entire 16 Mbyte address space of the on-chip W65C816S
microprocessor. The System Memory Map is shown in Table 1-5. The on-chip I/O, Timers, Control
Registers, Shift Registers, Interrupt Registers, and Data Registers are presented in Table 1-6A through 1-
6D, I/O Memory Map, Control and Status Register Memory Map, Timer Register Memory May, and
Communication Memory Map. The W65C265S has twenty-nine (29) priority encoded interrupts whose
vector addresses are listed in Table 1-7A and B, Vector Table.
1.13
Data Bank Register (DBR)
Data Bank Register (DBR)
Program Bank Register
N
8 BITS
(PBR)
Programming Model and Memory Map
00
00
V
M
1
Figure 1-16 W65C816S Programming Model and Memory Map
Status Register (P)
8 BITS
B
X
Direct Register (DH)
Stack Register (SH)
Accumulator (B)
X Register (XH)
Y Register (YH)
Program (PCH)
Shaded blocks = 6502 registers
Negative 1=negative
D
Memory Select 1=8-bit, 0=16-bit
Index Register Select 1=8-bit, 0=16-bit
Overflow 1=true
Break Command 1=Break, 0=IRQB
I
Decimal mode 1=true
8 BITS
IRQ disable 1=disable
Z
Direct Register (DL)
Stack Register (SL)
Accumulator (A)
X Register (XL)
Y Register (YL)
Counter (PCL)
Zero 1=result zero
Emulatio
Carry
C
E
n
1=emulation
1=true
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