mfr4200 Freescale Semiconductor, Inc, mfr4200 Datasheet - Page 27

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mfr4200

Manufacturer Part Number
mfr4200
Description
Flexray Communication Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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2.1.3.2
The CLK_S[0:1] pins select the CLKOUT pin output clock frequency or disable the output clock.
2.1.3.3
The SCM[0:1] bits of the MCR0 register (see
select the bus driver type.
Freescale Semiconductor
Clockout Selection
Bus Driver Type Selection
As the IF_SEL[0:1] signals share pins with physical layer interface signals,
the interface type must be selected using either pullup or pulldown resistors.
IF_SEL[0:1] signals are inputs during the internal reset sequence and are
latched by the internal reset signal level. Refer to
Reset
As CLK_S[0:1] signals share pins with physical layer interface signals, the
CLKOUT function must be selected using either pullup or pulldown
resistors.
CLK_S[0:1] signals are inputs during the internal reset sequence and are
latched by the internal reset signal level. Refer to
Reset Generator
1
Refer to
Generator” for more information.
CLK_S0
RS485 (IDLE state coded as ’0’)
RS485 (IDLE state coded as ’1’)
0
1
0
1
Section 1.2, “Additional
Optical/Electrical PHY
Pin
Driver Type
for more information.
Reserved
Table 2-3. Bus Driver Type Selection
CLK_S1
Table 2-2. Clockout Selection
0
0
1
1
MFR4200 Data Sheet, Rev. 0
Chapter 3, “MFR4200 FlexRay Communication
Reading” for more information on RS485.
4 MHz output
10 MHz output
40 MHz output
Disabled (CLKOUT output is “0”)
NOTE
NOTE
1
1
CLKOUT Function
SCM1
0
0
1
1
Chapter 5, “Clocks and
Chapter 5, “Clocks and
SCM0
0
1
0
1
Controller)
Introduction
27

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