MSC2323258A-XXBS4 OKI [OKI electronic componets], MSC2323258A-XXBS4 Datasheet - Page 8
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MSC2323258A-XXBS4
Manufacturer Part Number
MSC2323258A-XXBS4
Description
2,097,152-Word x 32-Bit DRAM MODULE : FAST PAGE MODE TYPE WITH EDO
Manufacturer
OKI [OKI electronic componets]
Datasheet
1.MSC2323258A-XXBS4.pdf
(8 pages)
MSC2323258A-xxBS4/DS4
Notes:
84
1. A start-up delay of 200 s is required after power-up, followed by a minimum of eight
2. The AC characteristics assume t
3. V
4. This parameter is measured with a load circuit equivalent to 2 TTL loads and 100 pF.
5. Operation within the t
6. Operation within the t
7. t
8. t
9. t
initialization cycles (RAS-only refresh or CAS before RAS refresh) before proper device
operation is achieved.
Transition times (t
t
t
t
t
the open circuit condition and are not referenced to output voltage levels.
RCD
RCD
RAD
RAD
CEZ
CEZ
RCH
IH
(Min.) and V
(Max.), t
and t
(Max.) is specified as a reference point only. If t
(Max.) limit, access time is controlled by t
(Max.) is specified as a reference point only. If t
(Max.) limit, access time is controlled by t
or t
See ADDENDUM H for AC Timing Waveforms
RRH
REZ
REZ
must be satisfied for a read cycle.
must be satisfied for open circuit condition.
(Max.) and t
IL
T
) are measured between V
(Max.) are reference levels for measuring input timing signals.
RCD
RAD
(Max.) limit ensures that t
(Max.) limit ensures that t
WEZ
T
= 5 ns.
(Max.) define the time at which the output achieves
IH
CAC
AA
and V
.
.
RCD
RAD
RAC
RAC
IL
.
is greater than the specified
is greater than the specified
(Max.) can be met.
(Max.) can be met.
¡ Semiconductor