MSC23240D-60BS20 OKI [OKI electronic componets], MSC23240D-60BS20 Datasheet - Page 9

• Manufacturer Part Number: MSC23240D-60BS20
• Description: 2,097,152-word x 40-bit DYNAMIC RAM MODULE : FAST PAGE MODE TYPE
• Manufacturer: OKI [OKI electronic componets]

Notes: 1. A start-up delay of 200µs is required after power-up, followed by a minimum of eight initialization cycles
10. These parameters are referenced to /CAS leading edge in an early write cycle, and to /WE leading edge
12. In a test mode read cycle, the value of access time parameters is delayed for 5ns for the specified value.
11. The test mode is initiated by performing a /WE and /CAS before /RAS refresh cycle. This mode is
Semiconductor
2. The AC characteristics assumes t
3. V
4. This parameter is measured with a load circuit equivalent to 2TTL loads and 100pF.
5. Operation within the t
6. Operation within the t
7. t
8. t
9. t
(/RAS only refresh or /CAS before /RAS refresh) before proper device operation is achieved.
measured between V
t
the access time is controlled by t
t
the access time is controlled by t
not referenced to output voltage levels.
as electrical characteristics only. If t
remain open circuit (high impedance) throughout the entire cycle. If t
t
data read from the selected cell; if neither or the above sets of conditions is satisfied, the conditions of
the data out (at access time) is indeterminate.
in an /OE control write cycle or a read modify write cycle.
latched and remains in effect until the exit cycle is generated. The test mode specified in this data sheet
is a 2-bit parallel test function. CA0 is not used. In a read cycle, if all internal bits are equal, the DQ pin
will indicate a high level. If any internal bits are not equal, the DQ pin will indicate a low level.
The test mode is cleared and the memory device returned to its normal operating state by a /RAS only
refresh or /CAS before /RAS refresh cycle.
These parameters should be specified in test mode cycle by adding the above value to the specified
value in this data sheet.
RCD
RAD
OFF
RCH
WCS
AWD
IH
(Min.) and V
(Max.) and t
(Max.) is specified as a reference point only. If t
(Max.) is specified as a reference point only. If t
, t
or t
CWD
t
AWD
RRH
, t
(Min.) and t
must be satisfied for a read cycle.
RWD
IL
OEZ
and t
(Max.) are reference levels for measuring input timing signals. Transition time (t
(Max.) define the time at which the output achieves the open circuit condition and are
IH
CPWD
RCD
RAD
CPWD
and V
(Max.) limit ensures that t
(Max.) limit ensures that t
are not restrictive operating parameters. They are included in the data sheet
IL
t
CPWD
.
CAC
AA
T
(Min.), the cycle is a read modify write cycle and data out will contain
.
= 5ns.
WCS
.
t
WCS
(Min.), the cycle is an early write cycle and the data out will
RAC
RAC
RCD
RAD
(Max.) can be met.
(Max.) can be met.
is greater than the specified t
is greater than the specified t
CWD
t
CWD
(Min.), t
RCD
RAD
(Max.) limit, then
RWD
(Max.) limit, then
t
RWD
MSC23240D
(Min.),
T
) are