A43E16161V-75F AMICC [AMIC Technology], A43E16161V-75F Datasheet - Page 37
![no-image](/images/no-image-200.jpg)
A43E16161V-75F
Manufacturer Part Number
A43E16161V-75F
Description
1M X 16 Bit X 2 Banks Low Power Synchronous DRAM
Manufacturer
AMICC [AMIC Technology]
Datasheet
1.A43E16161V-75F.pdf
(46 pages)
- Current page: 37 of 46
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CLOCK
A10/AP
Active/Precharge Power Down Mode @CAS Lantency=2, Burst Length=4
PRELIMINARY
ADDR
RAS
CAS
CKE
DQM
CS
DQ
BA
WE
0
* Note : 1. All banks should be in idle state prior to entering precharge power down mode.
t
1
SS
Power-down
Precharge
2. CKE should be set high at least “1CLK + t
3. Cannot violate minimum refresh specification. (32ms)
* Note 1
Entry
(August, 2005, Version 0.0)
2
3
*Note 3
4
t
5
SS
Power-down
Precharge
* Note 2
Exit
6
Row Active
Ra
Ra
t
7
SS
Power-down
Active
Entry
8
SS
” prior to Row active command.
9
36
t
10
SS
Power-down
Active
Exit
11
Read
Ca
12
13
Qa0
AMIC Technology, Corp.
14
Precharge
Qa1
15
Qa2
16
A43E16161
17
: Don't care
18
19
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